P_DIODE design issue

[skoda]

Hi,

guys I have problem with P_DIOD design, as you can see to set this device to strong inversion ( gmoverid near to 10) I choose W/L= 1/12, problem is that this p_diod have large vds=720mV a therefore less voltage left fo DIFF_PAIR which is going to triode and Gain of this OTA is going to hell.




So I can change W/L of P_DIOD to makes vds smaller than 720mV but there will be no in Strong inversion.But still vdsat of DIFFPAIR is 63mV which is not real value, so Vds(DIFFPAIR)=83mV is still small.

 

[erikl]

... there will be no in Strong inversion.

Why do you think the P_DIOD pmos should be in strong inversion?

At a power supply voltage of 0.9V, an N_TAIL vds≈0.2V and a P_DIOD v_th,p≈620mV you can't get much more vds at your N_DIFFP pair.

You could still play with the P_DIOD pmos' W/L ratio (increase it, resp. their m factor) in order to get a larger output swing range.

 

[skoda]

Hi Erikl,

my mentor told my exactly the same, why do you think that P_DIOD should be in strong inv?
Well I actually dont know maybe I read some paper and make some bad conclusion.
Anyway is here any rules/papers or some information in which region should be DIODE,DIFFPAIR,BIAS,CASCODE and others?

 

[Dominik Przyborowski]

Anyway is here any rules/papers or some information in which region should be DIODE,DIFFPAIR,BIAS,CASCODE and others?

It's always trade-off between speed, headroom and mismatch. In strong inversion fets are faster and has better matching, but they require more headroom voltage, while in weak inversion we maximizing a transconductance to current ration and have more headroom for Vds. The noise behaviour of fets in weak inversion (neglecting some short channels effects) is also better than in strong inversion.

 

[erikl]

... is here any rules/papers or some information in which region should be DIODE,DIFFPAIR,BIAS,CASCODE and others?

Dominik's answer is a good summary to your question. From this book you may learn the details.

 

[skoda]

So every mosfet use { like a diffpair, cascode, common source ...} could be designed in Wi/Mo/Strong inversion? there will be some tradeoff, okay speed, headroom noise but it will still work as cascode or common source , right?

 

[erikl]

So every mosfet use { like a diffpair, cascode, common source ...} could be designed in Wi/Mo/Strong inversion? there will be some tradeoff, okay speed, headroom noise but it will still work as cascode or common source , right?

Sure. And you also may mix different MOSFETs operating in different inversion modes as well as in different operation regions in the same design, optimizing their operation field for their actual job.

 

[Dominik Przyborowski]

So every mosfet use { like a diffpair, cascode, common source ...} could be designed in Wi/Mo/Strong inversion? there will be some tradeoff, okay speed, headroom noise but it will still work as cascode or common source , right?

Yes, for example in OTA usually we choose W/L of input pair to biased it in moderate inversion (Id=Ispec), while loading current mirror is biased in strong mod/strong inversion region for offset reduction. Also cascode current mirrors are designed as high-swing ones with current sources transistors working in mod/strong inv. for good matching and cascode fets in weak or weak/mod inversion regions for higher headroom.
In some cmos processes which provides fets with very high current gain factor (in order of 1mA/V²) the weak inversion region and degeneration are common used for current sources, etc.

 

[skoda]

Thanks guys, now is designing a little bit easier

Well I have one question about serial transistor, I make a symbol for that as you can see on picture OTA and his Tail-Bias transistor is two serial in Symbol, problem is that I lose some overview, I dont see voltage current, sure I can look on another transistor and derive it but when all circuit will be symbols? How do you work with serial mosfet, do you have some tricks for that?

 

[Dominik Przyborowski]

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