non-inverting buffer

[anhnha]

I got stuck with an exercise about non-inverting buffer. Please help me with the question below.
Thanks.

 

[Y.SAI SARASWATHI]

let me guess the answer for those characteristics below
when the input value is very small i,e less than volt equivalent temperature the circuit will not respond to it,
then the voltage generated at the output terminals at room temperature will be observed at output terminals.
(sorry if i am wrong)

 

[Prashanthanilm]

pMOS passes strong 1(Vdd)
nMOS passes strong 0(Vss)

Therefore it is a Bad Circuit.

The Graph will start from Vt and not from 0 .And Saturate at VDD-Vt and not Vt.

For more information , read the nMOS and pMOS characteristics.

Any Specific question ask here.

 

[FvM]

This solution is a bit confusing.

Yes. At least it doesn't show the exact circuit behaviour. To get an idea about it, you can assume different loads, e.g. capacitive or resistive, both pull-down and pull-up and consider the expectable output with 0 -> Vdd -> 0 triangle input waveform.

pMOS passes strong 1(Vdd)
nMOS passes strong 0(Vss)

I guess you didn't understand the circuit. PMOS is in bottom, NMOS in top position.

 

[Prashanthanilm]

I guess you didn't understand the circuit. PMOS is in bottom, NMOS in top position.

Its a Bad Circuit of the same reason. pMOS at the bottom and nMOS at the Top.
pMOS will pass Vt to VDD and nMOS will pass VDD-Vt to 0 .

So, here it is Vt to Vdd-Vt.

Something I am missing ?

 

[anhnha]

Thank you, everyone.
Could you tell me how to derive Vout = Vt as Vin < Vt?
As Vin < Vt, which operating region each mosfet is?
I think pmos will be ON and NMOS will be in sub-threshold region.

 

[erikl]

pMOS passes strong 1(Vdd)
nMOS passes strong 0(Vss)

Something I am missing ?

I think so:

nMOS passes weak 1 (Vdd)
pMOS passes weak 0 (Vss)

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As Vin < Vt, which operating region each mosfet is?
I think pmos will be ON and NMOS will be in sub-threshold region.

No: PMOS is in sub-threshold region (Vin < |Vt|), and NMOS is OFF (Vin « Vt).

 

[anhnha]

No: PMOS is in sub-threshold region (Vin < |Vt|), and NMOS is OFF (Vin « Vt).

How would you know that without knowing Vgs of each transistor?
For NMOS, Vgs = Vin - Vout is unknown
For PMOS, Vsg = Vout - Vin is also unknown.

 

[erikl]

How would you know that without knowing Vgs of each transistor?
For NMOS, Vgs = Vin - Vout is unknown
For PMOS, Vsg = Vout - Vin is also unknown.

Is it? See the Vout vs. Vin characteristic in your 1^st posting!

 

[anhnha]

Is it? See the Vout vs. Vin characteristic in your 1^st posting!

That is the solution. I need to draw that characteristic.
We can't rely on the answer given to know if which region a transistor is operating. :-D

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No: PMOS is in sub-threshold region (Vin < |Vt|), and NMOS is OFF (Vin « Vt).

Why not both are in sub-threshold region?

 

[erikl]

Ok . Then sketch the output characteristics (log. Ids vs. Vds, parameter Vgs) of the 2 FETs. The NMOS sources, the PMOS sinks this current. For approximation take their saturation currents, e.g. @ Vds=Vdd/2, with these calculate their DC output resistance Rout = Vds/Ids (again Vds=Vdd/2), then consider these 2 Rout's as voltage divider - so get your Vout.

Of course this is an approximation, but it works because the Ids changes from Vgs < 0 (OFF) via Vgs=0 to Vgs=Vth (sub-threshold) to Vgs > Vth (ON) - and so the Rds changes - are relatively steep.