Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Why output voltage so small?

Status
Not open for further replies.

Osawa_Odessa

Banned
Full Member level 3
Joined
Dec 31, 2012
Messages
168
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,298
Visit site
Activity points
0
Hi,
I am simulating RF self-biased cascode power amplifer in Cadence under the paper below:
A 2.4GHz, 0.18µm CMOS self-biased cascode power amplifier. (attached below)
My problem is that the output voltage, Vout, is even smaller than input voltage, Vin. Meaning that it doesn't amply at all even attenuate input signal.
Could anyone help?
Here is the simulation schematic:
attachment.php

And this is waveforms at some important nodes:
attachment.php

And the paper:
 

Attachments

  • waves_selfbiased_12.10.13.png
    waves_selfbiased_12.10.13.png
    43.4 KB · Views: 171
  • self-biased cascode PA.png
    self-biased cascode PA.png
    7.6 KB · Views: 221
  • A 2.4-GHz 0.18-um CMOS Self-Biased.pdf
    467.6 KB · Views: 151

Why the 1KH inductor in the source you don't RF choke the ground. This is what kills your gain (A~=Zo/Zs). What you did is a MEGA source degeneration. remove L2 with a short and try again.

Good luck !
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top