regarding metastability:

[vivek kumar gupta]

which of the following is true regarding metastability:

1.depends on setup violation
2.depends on hold violation
3.can be seen as increase in clock to q delay
4. none of these.


please tell me the ans

 

[jeet_asic]

Re: egarding metastability:

Whenever there are setup and hold time violations in any flip-flop, it enters a state where its output is unpredictable: this state is known as metastable state (quasi stable state); at the end of metastable state, the flip-flop settles down to either '1' or '0'. This whole process is known as metastability. Whenever the input signal D does not meet the setup time and hold time of the given D flip-flop, metastability occurs.


When a flip-flop is in metastable state, its output oscillate between '0' and '1' . How long it takes to settle down, depends on the technology of the flip-flop.

 

[tariq786]

Re: egarding metastability:

In my opinion 1, 2 and 3 are all correct. Others can correct me if i am wrong

 

[englishdogg]

This should be helpful
What Is Metastability?