Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

20nm and 28nm CMOS technology

Status
Not open for further replies.

dutu05avl

Newbie level 1
Newbie level 1
Joined
Aug 21, 2009
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,294
Hi members,

I am using the 28nm CMOS28LP technology coming from ST or IBM (or both).

When I am trying to see the DC Operating Point for one transistor, parameters like (gm, id, vth, cgs...), they are not displayed. After I made sure that there is no installation problem, I looked into de transistors model files and I found out that are encoded. Also when performing a DRC on my layout, the errors are not displayed (also because some files are encoded).
Unfortunately almost the same thing is happening with the 20nm techology coming from Leti-CEA (DC operaring Point is not displaying anything, the transistor is like a black box, but the DRC rules are working).

1) Is someone using this technologies and has the same problems?
I bealive this is a marketing stratedy, but if not this means that the integrated circuit design is going to be very different starting from now (almost blindness or ridiculous) because we could never optimise a design.

2) Why do you think this is not happening with 65nm or 90nm or 130nm.... ?

Regards,
 

Maybe because some rules are not yet finalized?
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top