mobility of NMOS and PMOS for 90nm

[faiq khalid lodhi]

can any one tell me the mobility of NMOS and PMOS for 90nm

 

[dkace]

That depends on the technology you are designing. What is exactly your need? Why you ask for the mobility? Do you build a model for a specific application/case study?

D.

 

[erikl]

See e.g. the MOSIS WAFER ACCEPTANCE TESTS for an appropriate process (scroll down for Spice data -- adapted, of course, but quite usable in case of mobilities).

 

[leehying]

I used to think that you can find it in your SPICE model.

 

[leo_o2]

Usually NMOS mobility is bigger than PMOS's.

 

[erikl]

Usually NMOS mobility is bigger than PMOS's.

Electron mobility is always bigger than hole mobility (and not only in Si).

 

[palmeiras]

Hi faiq khalid lodhi,

Considering a 90 nm CMOS Technology (@ 300k)

For NMOS: U0 ~ 485 [μA/V*V]
For PNMOS: U0 ~ 106 [μA/V*V]

However, keep in mind that these are approximate values. These values depend on process, temperature, ...

 

[erikl]

These values are quite trustable, I think. They're very close to those extracted from my link given above:

µ0(NMOS) = 500 μA/V²
µ0(PMOS) = 117 μA/V²

 

[leo_o2]

I think mobility also depends on doping, temperature and etc.

Electron mobility is always bigger than hole mobility (and not only in Si).

 

[faiq khalid lodhi]

thankx for all who help me in order to find out the mobility of 90nm technology.

i have found the following values in my SPICE model.
µ0(NMOS) = 500 μA/V²
µ0(PMOS) = 200 μA/V²

which are similar to the values that Erikil has posted in this thread.

and by using this i have to calculate the Cox for NMOS and PMOS and that are 13.9X10^-9 pF/um for pMOS and for nMOS 14.8X10^-9 pF/um.

by using all these values i found out the wp/wn and that is 2.66.

can anybody tell me whether it is correct for the above mentioned values?

---------- Post added at 12:24 ---------- Previous post was at 12:23 ----------

thankx for the link.

 

[erikl]

Electron mobility is always bigger than hole mobility (and not only in Si).

I think mobility also depends on doping, temperature and etc.

This is true; still electron mobility is bigger than hole mobility at comparable doping & temperature.
Just think what "holes" really are: electrons with a lot of stopovers ;-)

---------- Post added at 15:56 ---------- Previous post was at 15:43 ----------

thankx for all who help me in order to find out the mobility of 90nm technology.

i have found the following values in my SPICE model.
µ0(NMOS) = 500 μA/V²
µ0(PMOS) = 200 μA/V²

which are similar to the values that Erikil has posted in this thread.

Not really: compare our µ0p values!

by using all these values i found out the wp/wn and that is 2.66.

can anybody tell me whether it is correct for the above mentioned values?

From palmeiras' and from MOSIS data values, a factor of ≈4 is more plausible (for 90nm process).