cadence transient analysis convergence problem

[jszair]

Hi, I'm simulating a ota with capacitance feedback and run into convergence problem in transient analysis. DC analysis is fine. The following are simulation reports, any suggestion?

Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
Version 6.2.1.170 -- 10 Feb 2008
Copyright (C) 1989-2007 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

Protected by U.S. Patents: 5,610,847; 5,790,436; 5,812,431; 5,859,785; 5,949,992; 5,987,238; 6,088,523; 6,101,323; 6,151,698; 6,181,754; 6,260,176; 6,278,964; 6,349,272; 6,374,390; 6,493,849; 6,504,885; 6,618,837; 6,636,839; 6,778,025; 6,832,358; 6,851,097; 6,928,626; 7,024,652; 7,035,782; 7,085,700; 7,143,021.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

Simulating `input.scs' on princess.ece.utexas.edu at 12:43:23 PM, Wed Jul 7, 2010.
Command line:
\
/usr/local/packages/cadence_2007/mmsim/tools.lnx86/spectre/bin/32bit/spectre \
input.scs +escchars +log ../psf/spectre.out +inter=mpsc \
+mpssession=spectre0_22309_8 -format sst2 -raw ../psf \
+lqtimeout 900 -maxw 5 -maxn 5
spectre pid = 23836

Loading /usr/local/packages/cadence_2007/mmsim/tools.lnx86/cmi/lib/5.0/libinfineon_sh.so ...
Loading /usr/local/packages/cadence_2007/mmsim/tools.lnx86/cmi/lib/5.0/libnortel_sh.so ...
Loading /usr/local/packages/cadence_2007/mmsim/tools.lnx86/cmi/lib/5.0/libphilips_sh.so ...
Loading /usr/local/packages/cadence_2007/mmsim/tools.lnx86/cmi/lib/5.0/libsparam_sh.so ...
Loading /usr/local/packages/cadence_2007/mmsim/tools.lnx86/cmi/lib/5.0/libstmodels_sh.so ...
Using new Spectre Parser.

Warning from spectre during initial setup.
WARNING (CMI-2426): I0.I3.M4: `Pdiblc2' = -10e-06 is negative.
WARNING (CMI-2426): I0.I3.M5: `Pdiblc2' = -10e-06 is negative.
WARNING (CMI-2426): I0.I3.M6: `Pdiblc2' = -10e-06 is negative.
WARNING (CMI-2426): I0.I3.M7: `Pdiblc2' = -10e-06 is negative.
WARNING (CMI-2426): I0.I2.M7: `Pdiblc2' = -10e-06 is negative.
Further occurrences of this warning will be suppressed.
Notice from spectre during topology check.
Only one connection to the following 2 nodes:
net051
net058
No DC path from node `net051' to ground, Gmin installed to provide path.


Circuit inventory:
nodes 84
equations 104
bsim3v3 82
capacitor 6
isource 1
resistor 10
transformer 4
vcvs 9
vsource 7


Warning from spectre.
WARNING (SPECTRE-6006): 71 warnings suppressed.

Entering remote command mode using MPSC service (spectre, ipi, v0.0, spectre0_22309_8, ).

************************************************
Transient Analysis `tran': time = (0 s -> 10 us)
************************************************
Trying `homotopy = gmin' for initial conditions.
Trying `homotopy = source' for initial conditions.
Trying `homotopy = dptran' for initial conditions.
Important parameter values:
start = 0 s
outputstart = 0 s
stop = 10 us
step = 10 ns
maxstep = 200 ns
ic = all
skipdc = no
reltol = 1e-03
abstol(V) = 1 uV
abstol(I) = 1 pA
temp = 27 C
tnom = 27 C
tempeffects = all
errpreset = moderate
method = traponly
lteratio = 3.5
relref = sigglobal
cmin = 0 F
gmin = 1 pS
maxrsd = 0 Ohm
mos_method = s
mos_vres = 50 mV


Error found by spectre at time = 9.75307 ns during transient analysis `tran'.
ERROR (SPECTRE-16192): No convergence achieved with the minimum time step specified. Last acceptable solution computed at 9.75307 ns.

The values for those nodes that did not converge on the last Newton iteration are given below. The manner in which the convergence criteria were not satisfied is also given.
Failed test: | Value | > RelTol*Ref + AbsTol

I(V0) = 20.6083 A, previously 5.98046 A.
update too large: | -14.989 A | > 20.6083 mA + 1 pA
I(V2) = 2.14192 A, previously 621.687 mA.
update too large: | -1.55777 A | > 2.14192 mA + 1 pA
I(I0.I1.I4.E2) = -46.5438 A, previously -13.5091 A.
update too large: | 33.8504 A | > 46.5438 mA + 1 pA
I(I0.I2.I2.E2) = 27.7649 A, previously 8.06592 A.
update too large: | -20.1853 A | > 27.7649 mA + 1 pA
I(I0.I3.I2.E2) = -620.767 A, previously -180.165 A.
update too large: | 451.48 A | > 620.767 mA + 1 pA
I(I0.V0) = -13.1749 A, previously -3.83602 A.
update too large: | 9.56953 A | > 13.1749 mA + 1 pA
I(I2.K0:t1) = -6.22303 A, previously -1.80596 A.
update too large: | 4.52613 A | > 6.22303 mA + 1 pA
I(I2.K1:t1) = 4.08111 A, previously 1.18427 A.
update too large: | -2.96836 A | > 4.08111 mA + 1 pA

The following set of suggestions might help you avoid convergence difficulties.

1. Evaluate and resolve any notice, warning, or error messages.
2. Use realistic device models. Check all component parameters, particularly nonlinear device model parameters, to ensure that they are reasonable.
3. Small floating resistors connected to high impedance nodes might cause convergence difficulties. Avoid very small floating resistors, particularly small parasitic resistors in semiconductors. Instead, use voltage sources or iprobes to measure current.
4. Ensure that a complete set of parasitic capacitors is used on nonlinear devices to avoid jumps in the solution waveforms. On MOS models, specify nonzero source and drain areas.
5. Perform sanity check on the parameter values using the parameter range checker (use ``+param param-limits-file'' as a command line argument) and heed any warnings. Print the minimum and maximum parameter value using the `info' analysis. Ensure that the bounds given for instance, model, output, temperature-dependent, and operating-point (if possible) parameters are reasonable.

6. Check the direction of both independent and dependent current sources. Convergence problems might result if current sources are connected such that they force current backward through diodes.

7. Enable diagnostic messages by setting option `diagnose=yes'.
8. Use the `cmin' parameter to install a small capacitor from every node in the circuit to ground. This usually eliminates any jumps in the solution.
9. Loosen tolerances, particularly absolute tolerances like `iabstol' (on options statement). If tolerances are set too tight, they might preclude convergence.
10. Try to simplify the nonlinear component models in order to avoid regions in the model that might contribute to convergence problems.

Analysis `tran' was terminated prematurely due to an error.
finalTimeOP: writing operating point information to rawfile.

******************
DC Analysis `dcOp'
******************
Important parameter values:
reltol = 1e-03
abstol(V) = 1 uV
abstol(I) = 1 pA
temp = 27 C
tnom = 27 C
tempeffects = all
gmin = 1 pS
maxrsd = 0 Ohm
mos_method = s
mos_vres = 50 mV
Convergence achieved in 2 iterations.
Accumulated dc load time = 0 s.
Accumulated dc factor time = 0 s.
Accumulated dc solve time = 0 s.
Accumulated dc output time = 0 s.
Total time required for dc analysis `dcOp' was 10 ms.

dcOpInfo: writing operating point information to rawfile.
modelParameter: writing model parameter values to rawfile.
element: writing instance parameter values to rawfile.
outputParameter: writing output parameter values to rawfile.
designParamVals: writing netlist parameters to rawfile.
primitives: writing primitives to rawfile.
subckts: writing subcircuits to rawfile.

 

[dick_freebird]

Try setting cmin to some reasonable value. That would be something
like 1/10 your minimum sized transistor Cgs, maybe.

 

[keith1200rs]

Add a large resistor such as 10G ohm from net051 to ground.

Keith

 

[AdvaRes]

Increase also the simulation time.

 

[keith1200rs]

Increase also the simulation time.

I doubt that will help - the transient analysis is aborting prematurely anyway, most likely due to the floating node which causes a singularity.

Keith

 

[LvW]

What about initial conditions? Activated yes or no? Try both alternatives.

 

[pavel_adameyko]

Try to decrease maximum time step.

 

[dick_freebird]

Cranking down simulator tolerances can help, in cases where the
problem lies with some component that has a superlinear
high voltage/current response or singular behavior outside the
normal, fitted model range. Not stepping off the cliff in the first place,
helps.

Some solution methods seem to run cleaner than others. TRAP
is fast and really easy to drive into the weeds; Euler is the most
damped and sometimes this is exactly what you need. GEAR,
somewhere in the middle.

You could go probe around in the results just before the thing
blew up, and see which nodes / ports are headed out into the kV/kA
range, and perhaps determine why. Ridiculously low capacitances
are the most common cause of timestep convergence fails
in my observation.