I have difficulty in understanding layout of MIM capacitator

[henrywent]

high k mim cap

hi there,
I have difficulty in understanding the layout of MIM capacitor Pcell provided by the SMIC PDK. From the layout , the MIM capacitor is composed of m5, mim and m6 layers. m6 is the top layer in the process. my question is if m5 is the bottom layer of the cap, which layer is the top layer of the cap, mim or m6? Is mim layer a physical layer or a dummy layer? what's more wierd is that both the bottom plate and the top plate are tapped out to m6 through VIA5-6. So it seems that there is no possibility for m6 to be the top layer of the capacitor and mim is a physical layer (and the top layer for the cap), but how can mim layer jump to m6 through VIA5-6, since it is not m5 metal? I am really confused, any comment will be appreciated.
regards,
henry

 

[erikl]

mim layer

Hi henrywent,
I understand well your confusion; I once had the same ;-) So I try to describe the structure and hope this is understandable:
The mim layer is an additional (physical, rather thin) metal layer between m5 and m6, separated by a very thin insulation layer from m5 (nowadays often from high k material), present only at the MIM cap positions (i.e. etched away elsewhere). This structure (thin isolation layer of high k material) allows for high cap value per area.
On top of the mim layer is the normal isolation layer between m5 and m6, hence the VIA5-6 connect mim with m6. And not m5 to m6, as the layout would make assume if the mim layer isn't shown.
Cheers, erikl

 

[henrywent]

Re: MIM capacitor

thank you, your reply is very helpful to me!