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and these are two distinct failure modes.Based on the 1-KHz pulse testing we have reviewed in this application note, cree suggests the following guidelines for pulsed current operations:
1. For duty cycles between 51-100%, do not exceed 100% of the maximum rated current;
2. For duty cycles between 10-50%, do not exceed more than 200% of the maximum rated current; 3. For duty cycles less than 10%, do not exceed more than 300% of the maximum rated current
its as in eg LT3756 datasheet buckBuck convertor with low side mosfet, Is LED connected between +Ve terminal and drain ?
I'm unable to find this idea in the present discussion. To which post are you referring particularly?You CANNOT use just an SMD ceramic ML capacitor as a way to arrest ESD.
I'm unable to find this idea in the present discussion. To which post are you referring particularly?
however a simple solution is to put 100nF on the LEDs then a capacitive divider cuts the voltage in half, absorbing all the energy. But your PWM might not like it, so an ICL is ideal.
A zener diode across the LEDs or even another larger capacitor across them would fix the problem, as would a bleed resistor or Zener on the PSU side. Even a ferrite bead on the LED side might be enough to smooth the pulse.
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