1/f noise analysis in Cadence

[Ugur Yegin]

Hi,

We have designed a basic current source loaded nmos common-source amplifier as well as an op-amp in a 0.35 technology in cadence and we would like to optimize the design for a minimum 1/f noise. Since I am not very familiar with noise simulations, can anyone help me with:

1) Does the regular noise analysis in cadence (input noise is not taken into condideration, just the noise added by the amplifiers) give the 1/f noise or is it the accumulated noise from thermal and frequency?
2) If it is the accumulated noise, how do I just get the 1/f noise?
3) How can I run the optimizer to minimize this value?

I would highly appreciate any help in this matter.

Thanks and Best Regards

Ugur Yegin

 

[master.ckt.breaker]

To analyze noise in your circuit, you can do "Noise" simulation in cadence. This simulation shows the noise contributed by various devices in the circuit. Once you do the noise simulation, plot the noise curve. This curve will be in the shape of regular noise curve which we see in text books. i.e. it will be high at low frequencies, exponentially decreases across frequency, after a particular f, its almost constant. That f is called noise corner. And any noise below this f is termed as 1/f noise and all the noise above f is termed as thermal noise.

You can print noise summary in cadence which will allow you find out integrated noise across a frequency band. It also displays major noise contributor devices along with the noise type. "id" implies thermal noise and "fn" implies 1/f noise. You can take alter the aspect ratios of these devices to decrease their thermal or 1/f noise accordingly.

MCB