0.18um VCO at 3Ghz....
i need 2 design a VCO operatin at 3Ghz.after some survey i've found out the best archi tat i can follow is 4stage diff. ring topology becuz it has good jitter performance, accurate matching,50% duty cycle,better immunity 2 common mode disturbance..but i confused wit the delay cell in ring osc. cct, what r the diff between source-coupled pair wit the symmetrical load & common delay cell wic is drain n gate connected????wat r range of tunable in 0.18um technology???can somebody tel me abt the power consumption limit 2?? Is ring osc stand by itself r ther is someother extra cct wic complete a good performance VCO???
Thanks in advance....attachment r articles suggested is appreciated