0.18 um twin well process?

[Btrend]

I have questions about the twin well process in 0.18um.
1. if it is really twin well process, then we can never faced the body effect problem of NMOS, if we always connect body to source, right? Of course, this will increase the area required .
2. if I use 0.18um 1.8V device , and always connect NMOS's body to source, then my Vgs=Vgb, then I can sustain more voltage at Vg with Vs > 0, for example Vs_min=0.5V. that is maybe I can use 0.18um device in Vcc =2.5V . But if the body Vb is connected to GND, then the COX breakdown will limit the available VCC, maybe only 2V or so for reliability issue. Am I right ?

Thanks in advance!

 

[steer]

I have questions about the twin well process in 0.18um.
1. if it is really twin well process, then we can never faced the body effect problem of NMOS, if we always connect body to source, right? Of course, this will increase the area required .

You need triple-well process to be do this. Twin well one has just Nwell and Pwell. Triple well have deep Nwell that can isolate Pwell, so nmos bulk can be tied to a signal.

2. if I use 0.18um 1.8V device , and always connect NMOS's body to source, then my Vgs=Vgb, then I can sustain more voltage at Vg with Vs > 0, for example Vs_min=0.5V. that is maybe I can use 0.18um device in Vcc =2.5V . But if the body Vb is connected to GND, then the COX breakdown will limit the available VCC, maybe only 2V or so for reliability issue. Am I right ?

Vbs alone does not cause oxide rupture, as there is a channel screening gate from bulk, if transistor is open. If it's closed the bulk field is quite weak to cause the oxide breakdown.
The only advantage of having triple well is keeping field in drain-bulk area lower, but in most 0.18um processes it can sustain 2.5V on drain diffusion anyway.