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why do we want VDS close to 0 in MOSFET ? thanks

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danishdeshmuk

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why do we want VDS close to 0 in MOSFET ?

thanks
 

if Vds is close to zero , means the device is in'linear resistance region'.
for digital circuits we make this to happen for output Vds to close to zero.
 
I suppose you mean Vds when the transistor is in the ON condition. If that's so, the reason is that Vds multiplied by Id represents a loss. Look at the schematic and think of the MOSFET as the equivalent of the conventional switch. If the MOSFET has a drop of 0.1V when it is in the ON condition, the load receives only 9.9V.

7_1323186079.png


It's not only that the load does not receive the full voltage. The voltage drop in the transistor multiplied by the current becomes power that is uselessly turned into heat inside the transistor. Therefore, the closer Vds is to 0 in the ON condition, the better.
 
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if i want to use MOSFET as a switch , then what would be the input side & what would be the input voltage applied ?

&

What would be the output side of the mosfet & what would be that output voltage ?

thanks
 

for an nmosfet as a switch :
i/p:between gate and source .
i/p voltage should be greater than Vthreshold.

o/p:betwn drain and source.
drain pulled up by a resistor(not recmndd) or by an active device.
 
for an nmosfet as a switch :
i/p:between gate and source .
i/p voltage should be greater than Vthreshold.

o/p:betwn drain and source.
drain pulled up by a resistor(not recmndd) or by an active device.

and for pmosfet ?

take any vgs (input voltage) and then tell me what should be vds (i.e. output voltage) ?

thanks
 
Firstly, Nmos is ON when Vgate = high, and Pmos is ON when Vgate = low. Also with the threshold voltage, and base on conducting condition, we can see that nMOS switch is "weak" 1, and pMOS is "weak" 0.

Secondly, For Nmos switch, source is typically tied to ground and is used to pull-down signals, and for pMOS switch,source is typically tied to Vdd, used to pull signal up. And note that the MOS transistor is a symmetric device, this means that the drain and the source terminal are interchangeable. For a conducting nMOS transistor, Vds > 0V; for the pMOS transistor Vds < 0V (or Vsd >0V). :smile:

Hope this help!
Duc.
 
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    butchi

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munzir:
are you referring to a pmos device with source connected to +Vdd or as a separate pmos alone circuit?
 
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    munzir

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separate alone circuit ..... want to switch on & off the mosfets whether p channel , n channel or power mosfet ?

thanks
 

for a pmosfet alone circuit:
i/p betwn gate and source.
gate should at a negative value lesser than Vthreshold of pmos.

o/p betwn drain and source.
connect drain to a pullup resisitor or load.

compared to nmos ,
source is at a +ve voltage than drain.(so that drain and load to a -ve terminal).

i/p at gate a negative voltage for turn on and zero for turn off.
 
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