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Basics of VHDL programming

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Vineeth_S

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hi all
can anyone suggest me some good book to study the concept and programming in VHDL. i studied some web pages, that made me to confuse between structural , behavioural, data flow type..
what for we use "portmap", "component", how to access the variable's mentioned in portmap ? i totally messed up with these thinks :( pls help me.


Thanks in advance :)
 

VHDL is NOT a programming language. It is a description language.

Before you go anywhere near VHDL, you need to understand digital electronics.
 

yeah i know. i m ECE graduate. i m looking for some good book to study deep in VHDL. before i was clear with the concepts, now these web pages made me confuse.
 

The Designer's Guide to VHDL (Systems on Silicon) by Peter J Ashenden is supposed to be good.
 

View attachment inv.bmp
ENTITY buffer IS
PORT ( a : in bit;
b : out bit);
END buffer;

ARCHITECTURE basic OF buffer IS
component inv
port (i : in bit;
o : out bit);
end component;
SIGNAL temp : bit;
BEGIN

a1 : inv port map (a,temp);
a2 : inv port map (temp,b);

END basic;

In this program, what a1,a2 means ?
how this signal is getting inverted without using NOT command ??
 

In this program
Click to expand...

Stop calling it a program, it is NOT a program. Think of it more like a circuit.

what a1,a2 means ?
Click to expand...

They are just labels to differentiate between the two instantiations of the inv component.

how this signal is getting inverted without using NOT command ??
Click to expand...

I assume the "inv" component is doing it. This component will link to another entity that probably has the not command in it.
 
Get FPGA Prototyping by VHDL Examples, Pong P.Chu. In my opinion, it is the best book to learn VHDL. It begins from basics.
 
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