question regards to fan out

Hi All,

In some digital systems, it is necessary for a single TTL logic gate to drive more than 10 other gates or devices.When this is the case, a device called a
buffer can be used between the TTL gate and the multiple device it must be drive. A buffer of this type has an fan-out of 25 to 30.A logical inverter (also called a NOT gate) can serve this function in most digital circuits. My question is how can a logical inverter serve this function? Can a logical inverter drive
more than 10 outputs?Thanks.

You should check the specification of your logic inverter, example if the inverter has a maximum output current of 200mA while the required input current of the each gates you want drive is 20mA, then the logic inverter can drive 10 gates (200mA/20mA=10).
If youll use inverter, then you need two inverters so that the logic output will not be inverted. Put these gates in series between the driving gate and drived gates.

The answer is no. The type of logic function has no correlation to the fan-out. Logic functions are typically performed at the 'in' side of the circuits while fan-out is decided by the output stage alone.
There are some devices which have high drive capacity but the more normal approach would be to drive two or more buffers with the input signal and for each to drive many loads. For example, gate A has a fan-out of 10, it could drive 10 buffers, each with a fan-in of 1 and these would provide a total fan-out of 100.

Brian.

My question is how can a logical inverter serve this function? Can a logical inverter drive

Click to expand...

If the logic gate is designed for a higher fanout such as 25 or 30 it is possible. There are devices made for higher fanouts to drive multiple inputs.
There is problem with numbers quoted by "Onigece"

And in the case where you're driving high-impedance inputs (like regular CMOS) it becomes mostly a matter of board traces / input capacitance & operating speeds (more capacity to charge/discharge -> longer delay -> lower max. frequency). Or in other words: in that situation the fan-out would increase with lower operating frequency.

But as far as I know devices claim certain fanout as the characteristic and One unit load has a specific meaning in context of fanout.
TTL Unit Load: A load with TTL voltage levels, which will draw 40 µA for a logic 1 and -1.6 mA for a logic 0.

**broken link removed**

The relation described above by RetroTechie is not consistent with this.

TTL Unit Load - Encyclopedia

ark5230 said:

But as far as I know devices claim certain fanout as the characteristic and One unit load has a specific meaning in context of fanout.
TTL Unit Load: A load with TTL voltage levels, which will draw 40 µA for a logic 1 and -1.6 mA for a logic 0.

Click to expand...

Correct: this is fan-out described in terms of standard inputs, driven by 1 standard output of the same logic family. Topicstarter talked about TTL, but not whether or not the inputs driven are also TTL devices (and sometimes 'TTL' is used where people really meant random discrete logic family like 74xx, 74LSxx, 74Fxx, 74HCTxx etc, these days nobody uses original TTL anymore :razz: ).

For ancient TTL logic, these static load characteristics will likely dominate until you get into the MHz range. When driving CMOS inputs, static load is near-0 (apart from pull-ups etc on signals). But in all these cases, stray / input capacitances still apply - this just makes things more complicated as you crank up the switching frequencies.

Basically: fan-out is thought of as a constant, but you really shouldn't use it that way. And for today's logic technologies, the concept of fan-out is practically irrelevant.

Thanks that you agree with that fanout gives capacity to drive certain type of load.
Once you draw this meaning for your use, what load one is going to drive can be compared with the fanout capacity.
Recent, obsolete or ancient, in all cases fanout is fanout as defined not by arbitrary consideration of line condition, pullups stray capacitances etc. All these are to be taken care at the design time knowing the fanout.