Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Doubt regarding clock uncertainty..

Status
Not open for further replies.

sharif.shiek

Member level 4
Member level 4
Joined
May 30, 2011
Messages
77
Helped
14
Reputation
28
Reaction score
14
Trophy points
1,288
Location
Bangalore
Activity points
1,758
Hi everybody

if time period of a clock is 10ns and if uncertainty is as follows

clock_uncertainty -setup 3ns
clock_uncertainty -hold 1ns

then how tool will perform timing analysis for both setup and hold?

i mean is the tool will calculate the skew and jitters from clock uncertainty and perform setup and hold checks according to skew and jitters or directly it will subtract the uncertainty from time period for setup and will add for hold checks?..please clarify me..

thanks in advance
 

Hi everybody

if time period of a clock is 10ns and if uncertainty is as follows

clock_uncertainty -setup 3ns
clock_uncertainty -hold 1ns

then how tool will perform timing analysis for both setup and hold?

i mean is the tool will calculate the skew and jitters from clock uncertainty and perform setup and hold checks according to skew and jitters or directly it will subtract the uncertainty from time period for setup and will add for hold checks?..please clarify me..

thanks in advance

effective clock period for setup check = 10 -3 =7ns
 

Hi,
The tool subtracts the uncertainty from the required time for setup analysis and adds the uncertainty to the required time for hold analysis.
Typically pre CTS your uncertainty includes your clock jitter + skew + design margin and post CTS uncertainty will be clock jitter + design margin.
 
Hi,
The tool subtracts the uncertainty from the required time for setup analysis and adds the uncertainty to the required time for hold analysis.
Typically pre CTS your uncertainty includes your clock jitter + skew + design margin and post CTS uncertainty will be clock jitter + design margin.

thank you..
 

Hi,
The tool subtracts the uncertainty from the required time for setup analysis and adds the uncertainty to the required time for hold analysis.
Typically pre CTS your uncertainty includes your clock jitter + skew + design margin and post CTS uncertainty will be clock jitter + design margin.

How is hold going to be affected by varying the effective clock period?
 

How is hold going to be affected by varying the effective clock period?

no, hold is not depend on clock period, when there is a clock uncertainty then we add that to required time of hold and then we analyze timing path

---------- Post added at 07:28 ---------- Previous post was at 07:25 ----------

effective clock period for setup check = 10 -3 =7ns

why it subtracts the uncertainty from clock period, what happen if the uncertainty is positive, i mean if the skew is positive then effective clock period will increase, so how can we say that uncertainty should subtract from clock period for setup check
 
clock_uncertainty -setup 3ns

clock period is 10ns.

for setup check in this case, we calculate the setup margin with effective clock period of 7ns?
 

clock_uncertainty -setup 3ns

clock period is 10ns.

for setup check in this case, we calculate the setup margin with effective clock period of 7ns?

ya, but why we have to calculate the setup margin with effective clock period of 7ns, actually uncertainty include skew+jitter+margin so if the skew is positive skew then effective clock period will be increase..but here irrespective of skew(either positive or negative) we are directly subtracting the uncertainty from clock period, why?
 

ya, but why we have to calculate the setup margin with effective clock period of 7ns, actually uncertainty include skew+jitter+margin so if the skew is positive skew then effective clock period will be increase..but here irrespective of skew(either positive or negative) we are directly subtracting the uncertainty from clock period, why?

clock_uncertainty -setup 3ns

The 3ns includes skew+jitter+margin

You dont know the skew until you have built the clock tree. we take a pessimistic approach during synthesis and pre CTS.

uncertainty = skew+jitter+margin

the skew value can be positive or negative. It depends on how you define.
if the skew is useful, skew will be negative. otherwise, positive.

for hold, uncertainty = skew. it will not depend on jitter I think.
 

clock_uncertainty -setup 3ns

The 3ns includes skew+jitter+margin

You dont know the skew until you have built the clock tree. we take a pessimistic approach during synthesis and pre CTS.

uncertainty = skew+jitter+margin

the skew value can be positive or negative. It depends on how you define.
if the skew is useful, skew will be negative. otherwise, positive.

for hold, uncertainty = skew. it will not depend on jitter I think.

ya, for hold uncertainty includes only skew, jitter will not effect the hold
 

But cant the jitter be either positive or negative. If its positive jitter there wont be any hold violation, but if its negative jitter there is a chance for hold violation to occur. Please correct if I am wrong.
ya there is no issue of positive/negative for jitter, and one thing we have to notice is, jitter was not effect the hold, because we know that hold is calculated at same edge...
 

ya there is no issue of positive/negative for jitter, and one thing we have to notice is, jitter was not effect the hold, because we know that hold is calculated at same edge...

Can you please refer the below link and explain if possible
**broken link removed**

As per the pdf(link) , jitter impacts both setup and hold time on two different conditions
 
Last edited:

U can think as the uncertainty will give less margin for timing slack. So that means u need to subtract this value from the RT for setup and add this margin to RT for hold.

setup slack = RT - AT
hold slack = AT - RT

Hope its clear to u.
 
U can think as the uncertainty will give less margin for timing slack. So that means u need to subtract this value from the RT for setup and add this margin to RT for hold.

setup slack = RT - AT
hold slack = AT - RT

Hope its clear to u.

ya..ok..for getting worst case analysis, we have to subtract uncertainty from required time for setup and add to required time for hold checks..am i correct?

---------- Post added at 07:29 ---------- Previous post was at 07:28 ----------

U can think as the uncertainty will give less margin for timing slack. So that means u need to subtract this value from the RT for setup and add this margin to RT for hold.

setup slack = RT - AT
hold slack = AT - RT

Hope its clear to u.

ok, is jitter will effect the hold?
 

Can some one pls explain jitter impact on hold
 

Can some one pls explain jitter impact on hold

Jitter does not effect hold. It effects only setup.
Why because as hold is analysed on the same clock edge.

Hope it helped.

Cheers
 

Jitter does not effect hold. It effects only setup.
Why because as hold is analysed on the same clock edge.

Hope it helped.

Cheers

then what about vivek_p post
vivek_p said:
Can you please refer the below link and explain if possible
**broken link removed**

As per the pdf(link) , jitter impacts both setup and hold time on two different conditions
 

@vivek_p,

IN the pdf
"Tc_jitter=0, Tc_skew>0
The minimum clock period increases. The maximum
hold time increases ..hold time condition easier to
meet"

we all know that positive skew helps in meeting setup violations and makes it harder to meet hold requirements...

Maybe its a working copy for presentation in a class...I suggest refer couple of more documents and text books before concluding at a final answer..
Analyze it for your self
Jitter doesnt impact hold because hold is evaluated on the same clock edge and when both launch and capture flops are synchronous i.e both recieve clock from the same source the same amount of jitter will be present on arrival and required times which are two sides of the equation and hence they get cancelled out....Because Jitter is temporal variation of clock(quoting from Rabaey) and its value is same at a given instance of time.e.g If jitter value at 10th ns is 120ps it will be 120 ps at both launch and capture at 10 th ns.....Unlike skew which is spatial variation(again Rabaey) so the value will be different at launch and capture becuase of the distance travelled...

Hope it is useful,



cheers,
 
Last edited:
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top