Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I hope you already know what is "the standard cells library". If not in two words: the standard cell library is a set of difference type of general purpose gates,flip-flops etc. for example NOR, NAND, XOR, INV. Also possible 3 input NAND, NOR etc, library could include 2X, 3X... NAND or NOR gates, where 2X mean gate can pass 2 time bigger current. They are not specially designed gates. they have same logically function NAND, 2X NAND, or 3 input NAND, all of them are NANDs.
the Same picture in I/O standard cells. There are a set of I/O: I/O cells for 1.8V, I/O cells for 2.5V, I/O cells for 3.3V, with 2mA output currents, with 4mA, 6mA. Logically there are the same, difference only AC/DC characteristics.
most of IC-to-IC, IC-to-apparature interfaces are standartized (see PCI, TTL, CML,... standards in JEDEC documents). They define electrical and logical requirements to physical parts (i.e. I/O) of the interfaces,- like input/output switching levels, loading conditions,... That is why there are standards 1.8V CMOS, or 3.3V PCI,... I/Os. Everybody user will know, that TTL I/O shall provide minimum necessary number of definite electrical recuirements.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
