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Help to clear violations

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RAKESH E.R

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Dear sir,

###########
This is my DFT script::
Code: 
#declare the scanclocks, resets, and scanenable signals
set_dft_signal -view exist -type ScanClock -timing {45 55} -port System_Clock
set_dft_signal -view exist -type ScanClock -timing {45 55} -port SCK_s
set_dft_signal -view exist -type Reset -active 0 -port System_Reset 
set_dft_signal -view exist -type Reset -active 0 -port CS_s
set_dft_signal -view spec -type ScanEnable -active 1 -port CS_m

##report the scan signals specified
report_dft_signal
##create the test protocol
create_test_protocol -infer_clock -infer_async
##pre design rule check
dft_drc

############
DRC Report

Total violations: 41687

-----------------------------------------------------------------

67 MODELING VIOLATIONS
67 Cell has unknown model violations (TEST-451)

152 TOPOLOGY VIOLATIONS
90 Improperly driven three-state net violations (TEST-115)
62 Unconnected input pin violations (TEST-332)

41468 PRE-DFT VIOLATIONS
504 Uncontrollable clock input of flip-flop violations (D1)
1310 DFF set/reset line not controlled violations (D2)
19406 DFF set/reset line not controlled violations (D3)
64 Clock feeding data input violations (D10)
5 Clock feeding both clock and data input violations (D11)
20 Clock feeding multiple clock/set/reset inputs violations (D12)
20148 Clock path affected by clock captured by clock in level sensitive clock_port violations (D15)
11 Bus gate capable of contention violations (D20)


Warning: Violations occurred during test design rule checking. (TEST-124)

-----------------------------------------------------------------
Sequential Cell Report

20696 out of 36449 sequential cells have violations
to clear these vilations i tried writing autofix commands this way, but i am unable to clear the violations::
########## use autofix to fix problems with resets and clocks ###############
### enable auto fix
set_dft_configuration -fix_reset enable -fix_clock enable
set_dft_signal -view spec -type TestMode -active_state 1 -port System_Test
### autofix clocks
# system clock
set_dft_signal -view spec -type TestData -port System_Clock
set_autofix_configuration -type clock -control System_Test -test_data System_Clock
# SCK_s
set_dft_signal -view spec -type TestData -port SCK_s
set_autofix_configuration -type clock -control System_Test -test_data SCK_s
### autofix resets
# System_Reset
set_dft_signal -view spec -type TestData -port System_Reset
set_autofix_configuration -type reset -method mux -control System_Test -test_data System_Reset
# CS_s
set_dft_signal -view spec -type TestData -port CS_s
set_autofix_configuration -type reset -method mux -control System_Test -test_data CS_s
######### end of autofix commands
Click to expand...
Click to expand...

please help me what can i do to clear my violations
 

First and foremost, you need to resolve all of the D1, D2 and D3 violations before going forward. D1 means that you have scan flops in your design that are not being controlled in scan mode. Either you haven't defined the clock in your scan scripts or the clock is being gated/blocked in the design. If it is being gated then you need to force the mux to pass the clock. The D2 and D3 reset/preset violations are similar. All async resets need to be defined as clocks and they must be controlled at the top level.

To debug this I would simply trace the clock pin of the scan flop that has D1 violations within the netlist. I'm sure many violations will be associated with the same clock that isn't being controlled. I would also trace the reset violations the same way.

I haven't used auto-fix in a while, but last time I used it it worked fine. I used it for resets only, all clocks were controlled at the top level. Is it known that all of your clocks, async-resets and async-presets can be controlled at the top level? I would not use auto_fix unless I had to,I suggest that you trace the violations to determine why the clocks and resets are not being controlled.
 
Dear sir,
i have only 2 clocks in my project those are System_Clock and SCK_s, those two can i control by using this declarations written below? what are the other things that i have to add before creating the protocol? i am not getting any error instead its accepting all the signals which i have given but none of the violations are solving..

set_dft_signal -view exist -type ScanClock -timing {45 55} -port System_Clock
set_dft_signal -view exist -type ScanClock -timing {45 55} -port SCK_s


i am very new to dft field and a fresher too in professional field.. i am not able to understand what else i have to write in scripts other than this two lines..can you please help me to resolve this..? if you need any more information about my question i can give you..

Regards,
Rakesh
 

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