Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

What is the purpose of uniquify

Status
Not open for further replies.
M

mchandan

Newbie level 2
Newbie level 2
Joined
Sep 13, 2011
Messages
2
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,298
I had searched earlier and found the below thread

https://www.edaboard.com/threads/119329/

However the explanation given is - uniquify command is used to generate separate instances within the netlist... It is used before importing the list to place and route tool.

But in the RTL don't we already do that. Whenever we instantiate a module we ensure that there is no other instantiation with the same name. During synthesis the tool always preserves the instance name. So what purpose does uniquify serve.
 

Each instance of the the module can be implemented using different std.cells depends on timing/area/power requirments. So, one module can have different content after synthesis, but RTL had the same content.
Uniquify makes copies for each instance of the module and make it possible to change module content independently.
 
also, u can have different constraints on each duplicated instances~
in terms of physical view, there are treated as 2 different designs.
 

Thanks kornukhin for you reply. So uniquify allows for different implementation of same RTL.

Question for kornukhin> Why do we need to uniquify to apply separate constraints on the instances. Even if they are instances of the same design we could still apply different constraints to each instance by specifying the instance name?
 

For example, you have "adder" used in few places in your design.
Requirments are: freq=100 MHz, Leakage=100 pW.
Adder used in critical path should be optimized for timing (carry lookahead adder). Adder used in other places can be optimized for leakage power with increased delays (ripple carry adder).
So, the same "adder", depends on design target, can be implemented differently in different parts of design.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top