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[SOLVED] AWR Microwave Office - Using General Multi Layer Substrate

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Radike

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Hi,

I need to use the general multi layer definition for my passive structure. I have dielectric layers. The signal is in the 1st layer. I am getting some errors when I try to add an extraction for the Axiem simulation. The errors are:

failed to find any shape on EM layer "3" at location of port "1", please make sure EM mapping for "Thick Metal" is correct or shape is included by extraction

failed to find any shape on EM layer "3" at location of port "2", please make sure EM mapping for "Thick Metal" is correct or shape is included by extraction

I think it is due to the wrong stackup definition.

I have also attached the .emp file.

Thanks a lot!!
 

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  • CMOS_Passive.rar
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Hello Radika,

You need to setup Metal Line Types in the LPF file & then you should assign the layout for GM2CLIN ...
Then finally it Extracts properly their ia an very good tutorial with step by step Design Notes on using GMCLIN for Extraction at AWR FAQ website....
Go through the same

**broken link removed**

---manju---
 
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    Radike

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Hi,

Thanks for the reply. Should I define line types for all the layers I have?

In my case I have 4 layers including air:

--Air--
--Layer1-- (3um) Er = 4.2
--Layer2-- (0.6um) Er = 4.2
--Layer3-- (5.04um) Er = 3.7
--Ground--

My signal line is in layer 1. In this case is it enough to define one line type?

Thanks alot!!
 

Hello Radike,

Yes, only one "ML_LINE_1" Line Type defination is enough in the lpf for your requirement...
$STRUCT_TYPE_BEGIN "ML_LINE_1"
! -> Layer offset minWidth flags
"M1" 0 5e-006 0
$STRUCT_TYPE_END

Attached is a simple modified MWO project file for your reference...


---manju---
 

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  • CMOS_Passive_M.zip
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    Radike

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Thanks for the information!

---------- Post added at 08:48 ---------- Previous post was at 08:28 ----------

Hi,

I checked the project file you have attached. In this case you have defined four lines M1, Metal1, Metal2 and Metal 3. In the stackup M1, Metal1 and Thick Metal has been assigned to same dielectric layer 1. Can we do like that?
Also is it possible to know why we cannot directly assign Thick Metal by using the default lpf file?

Thanks alot!!!
 

hello manju,
i tried your advices but couldn't make it right unfortunately. Could you please help me with my problem;
i designed and drawed my circuit, the only problem is that ; one of the lines must be a bottom-layer, it should pass the way other face of the board, but i couldn't make this line something like bottom layer. if you desire to help, the .emp file is attached. a note is in the design notes.
waiting for your response
thanks
 
Last edited:

Hello,

hello manju,
i tried your advices but couldn't make it right unfortunately. Could you please help me with my problem;
i designed and drawed my circuit, the only problem is that ; one of the lines must be a bottom-layer, it should pass the way other face of the board, but i couldn't make this line something like bottom layer. if you desire to help, the .emp file is attached. a note is in the design notes.
waiting for your response
thanks

use the General Multilayer Substrate Definition: GMSUB substrate with "GM1LIN" instead of mtrace line (ID= X9) & then define the metal types as bottom metal in "lpf" file & then assign this "bottom metal" to GM1LIN in the layout shape properties.....



---manju---
 
Last edited:

    V

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Thank you manju, it was very helpful.
 

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