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How can I model bottom plate capacitance in a circuit?

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viperpaki007

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Hi,

I am using MOS capacitor in one of my circuits which is quite sensitive to bottom plate capacitance of the MOS capacitor. Unfortunately It seems that MOS capacitor model in the design kit does not include bottom plate capacitance. How Can i model bottom plate capacitance in the circuit then?

thanks
 

Re: MOS capacitor Model.

You might be better off to use a MOSFET of appropriate geometry.
But some MOSFET models converge poorly with shorted terminals.

Suppose you began with the desired moscap value, picked off the
gate geometry, simulated an equal geometry MOSFET-as-cap,
and picked off its Cdb, Csb, Cbs (well-sub) parasitics and put them
in as pcapacitors (if C-V junction nonlinearity is not a concern)
or correct-area, correct-type diodes that are lvsIgnored?
 
Re: MOS capacitor Model.

If you need NMOS in p-sub, there is no parasite bottom capacitance.
If you need PMOS, you can add diode (formed between Nwell and p-sub) model for this parasite bottom capacitance.
 
Re: MOS capacitor Model.

@Leo_o2 So you mean that for PMOScap, i should connect a diode of same size from bulk to ground. (Where Bulk is Nwell and ground is connected to P-Sub)?
 

Re: MOS capacitor Model.

Yes. Process might provide this model.
 
Re: MOS capacitor Model.

Diode model also include an dc on resistance. Do you have any idea that what will be its value for MOS diode?
 

Re: MOS capacitor Model.

viperpaki007 said:
dc on resistance ... what will be its value for MOS diode?
Click to expand...

R = Vr/Is ; Is = Js*Area

Vr = reverse voltage (nwell to substrate)
Is = reverse saturation current
Js = reverse saturation current density

Is or Js are SPICE parameters usually declared in (MOS) diode models. Js(BSIM default)=1e-4 A/m² = 1e-16 A/(µm)²
 
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