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place_opt command - IC compiler (synopsys)

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ee1

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Hi all,
i have a question regarding "place_opt" command:
can the tool decide adding cells (buffers for example) in order to optimize the design? or it place only the cells that exists in the netlist ?

thanks!
 

place_opt does placement + optimization, so yes, it will add buffers in the design to fix design rule violations (max_cap, max_trans), add in buffertrees for high fanout nets, and to help fix timing violations
 
just to complete the shelby's answer, it could add or removed buffer/inverter is needed.
 
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Hi,

"place_opt" command places the stdcells present in the netlist and adds extra buffers, inverters for the optimization.
it even performs high fan out synthesis for all high fan out nets, excluding clock nets.
Clock nets are treated as ideal nets.
 
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