What's Junction spiking of ESD ?

Who knows about it ?

In non-barrier metal processes aluminum can sit in physical contact with silicon. The silicon will diffuse into the aluminum and the aluminum will pit the silicon. This is a function of temperature and time after the aluminum is put down.

Under ESD events, large currents flowing through a contact can heat the contact up to the point where the aluminum diffuses deep into the silicon shorting out the p-n junction. It no longer is a rectifying junction.

This is what is ment by junction spipking.

Hope this helps....

Thanks very much ! And how to prevent junction spipking under ESD ?
In my output NMOS , the space between contact and active is 5um, it's enough ?

The shortest path in a junction is typically vertically from the contact to the silicon/junction under the contact. This is because the junction depth in most current process is very shallow. Placing a barrier metal in the junction will limit junction spiking. The barrier metal melts at a higher temperature than aluminum so it takes more energy to get it to move into the silicon.

For diffused resistors (N+ resistors) if you place the N+ in an N-well you will increase the distance the spike has to travel to short out the junction.

One way a MOSFET fails from ESD is by shorting out from drain to source. This usually occurs because a local region conducts all of the current. Gate to Drain contact spacing adds a ballasting resistance to the transistor helping to spread the current out along the entire width. In silicided devices you can accomplish this by using a silicide mask that blocks the silicide from forming in a region of the Drain. The silicide mask should overlap the gate so the silicide is pulled away from the gate edge on the drain side of the transistor. The larger the unsilicided region the more series resistance you put in the drain.

Hope this helps....

with the use of copper, I think this effect is not there. This was mainly a problem with the Aluminium.