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[Design Compiler synthesis with various Process]

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downloadman

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Hi,

Do we need to take care in teh synthesis, when we are going for 65nm synthesis to 40nm synthesis. Will there be any change in the tool optimization. The tool is design Compiler.
 

All you might need to do is to change the library that you are using for the synthesis process- they will have different gate models in different process.
 
Hi downloadman,

not much will vary during Synthesis process...but issues might come up for PnR..
For synthesis just specify your 40nm library as your target_library and the tool will take care of the optimizations

cheers,
 

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