difference b/w net & wire , pin, port , terminal

difference pin net port

Hi ,

can anyone explain me the following :

1) what is a net & wire, what is the difference betwee them

2) what pin, port, terminal and difference between them

Reagards,
K.VISWANADH BABU

difference between nets, ports and pins

1) what is a net & wire, what is the difference betwee them

2) what pin, port, terminal and difference between them


These terms confuse b/w verilog/vhdl implementatin and physical design

i am not sure about verrlog implementation

but net is logical naming of a connection b/w two pins,

port is the hierarchical connection b/w logical modules

This picture answers it all.



https://obrazki.elektroda.pl/52_1299122019.gif

Maybe somebody can clearify the difference of a terminal?
The description is missing in the picture

Terminals represent continuous, conservative ports in VHDL-AMS
Terminals have across (potential) and through (flow) aspects
Terminal types are referred to as “natures”
Example terminal natures (predefined):
.. electrical - voltage across, current through
.. translational – position across, force through
.. thermal – temperature across, power (or heat-flow) through
.. fluidic – pressure across, flow-rate through
Users can define custom terminal natures

I recently wrote an article on nets, wires and registers in Verilog. See https://go.mentor.com/wire-vs-reg

All of the terms you ask about have slightly different meanings depending on the context they are being using in.
A net is short for network, meaning set of connections. A wire is either a physical piece of metal that implements the network, or one of several logical representations in Verilog (wire, supply0, tri, etc. are all network representations in Verilog).

A pin is a physical connection for a single net. My FPGA has 235 pins that are soldered onto a printed circuit board. My laptop has a VGA port with 15 pins. In schematics and HDLs, pin and terminal are used interchangeably to represent the the point where the connection to a network is made.

A port is a group of pins representing a standard interface. In the physical world, a port is usually more than one pin. But in Verilog/VHDL, a port is usually just one pin. A port can be a connection in a logical hierarchy that has no physical representation.