Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Synopsys Timing Constraints and Optimization

Status
Not open for further replies.
uxarkirnamak

uxarkirnamak

Newbie level 3
Newbie level 3
Joined
Mar 21, 2010
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Location
World
Activity points
1,312
Hi guys!

I'm learning Digital Design with Design Compiler and I want to know more about timing constraints and optimization. Synopsys has published an excellent user guide named "Synopsys Timing Constraints and Optimization User Guide" but unfortunately it's in our uni's computers and we're not allowed to bring it home.

Could anyone of you upload that file here. I need it badly!!!

ThanX in advance!


P.S. I'm not quite sure if I've posted my request in the right place so, moderators, sorry please, if I've done something wrong.
 

pm sent
 
  • Like
Reactions: zhuzhu

    uxarkirnamak

    uxarkirnamak

    Points: 2
    Helpful Answer Positive Rating
    Z

    zhuzhu

    Points: 2
    Helpful Answer Positive Rating
Can you send it to me too?
Thank you.
 

Pls send it for me too. Can u also send any docs regarding primetime. it would be really useful

thanks a lot
 

Hi,

Could you please send it to me too.

Thanks
 

Can you please post it here.. Or send it across my mail Id ...??
 

I would suggest you to post the document here as it will be useful for others also. Please post the document here.
 

here it is njoy:-D
 

Attachments

  • Timing constraints and optimization.pdf
    4.2 MB · Views: 7,805
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top