Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Probable Interview Questions for DFT Engineer position at Nvidia & Intel

Status
Not open for further replies.

vishalmatam

Newbie level 3
Newbie level 3
Joined
Sep 11, 2010
Messages
3
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,309
Hello Friends,
I'm Vishal. I have applied for many full-time entry New College Graduate positions at Intel , Nvidia etc. I have already seen other threads where people have asked probable interview questions about DFT in general.

I would like to know interview questions related to DFT, ASIC Design Flow, how Perl can be helpful in design automation ( if possible some Q & A related to Perl ), interview questions based on VHDL/Verilog - like the usage of assertions, anything which is really important, Timing analysis, different commercial ATPG techniques , which is better etc

Also, additional tips regarding how to tackle a technical interview would be greatly appreciated.

Thanks a lot!

---------- Post added at 18:29 ---------- Previous post was at 17:55 ----------

HI - Can some one explain in detail ( simple words please ) about assertion based verification ?
 

do you already worked?
read book and made your try is the best, as good training when you done your master school.
 
I haven't worked at a company yet...I have the basic knowledge , but it's always better to discuss in an excellent forum like this , where experienced people can give you advice , coz they work in the VLSI industry...
 
I'm agree with you, you could find some good advise, but you need to know quite well the flow the different implication of differents files inputs to be able to catch the different solution provides in this kind of forum.
 

1) What is the DFT process for an ASIC?

2) What factors that affect scan chains?

3) What is the purpose of DFT?

4) What are the major cost factors of DFT and what do you do to lower costs?

5) What are the errors/problems that occur during the DFT process and how do you resolve them?

6) What tests do people use for DFT and what are their purpose?

7) How do clock domains affect DFT and how to you handle them?

8) Given a small circuit (see diagram) how would you generate tests for it?

Provide answers and I will grade them.
 
Hi,
I am also very interested in this subject, but the reference is very limited. You can share documents as well as experience?

Thanks!
 

Hi,
I am also very interested in this subject, but the reference is very limited. You can share documents as well as experience?

Thanks!

Which type of reference you required.Because I think,For Basics of DFT, Lots of material available on net.
 

Hai vishal,
I am working as a physical Design Engineer in an MNC.. I will share some of the question which I faced in Interview..

Usage of perl as a Physical Design Engineer:-
Some Cases we will have some repeated works needs to done manually EX:- getting some pin names from a file(ex:-cdl)

I am stong in perl, tcl and skill.., As a Physical Design Engineer u should concentrate more on tcl.. Because we can use tcl code inside tools,

but we cant use perl inside tool... Both tcl and perl are easy to learn...

1. Regarding PERL
1. What are hashes?(assosiative array)
2. pattern matching example?

We will normally get few questions on scripting..

But regarding Physical Design we will get more question

2.Physcial Design Questions:-

1.What will happen in DFT?
2.what is mux insertion?

DFT is a part of PD.. Timimg analysis is more important in PD.

Basic ques;-

1.Pd flow
2.set up time
3.hold time
4.cell delay
5.core utilization
6.Mention some technology?
etc...

:p
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top