VIVA questions for digital electronics lab

Can any one post the viva questions and answers for digital electronics lab.
The experiments are
1.half adder and full using NAND
2.binary to gray code converter
3.gray to binary code converter
4.BCD to Excees3 code converter
5.binary adder/subtractor and BCD adder using IC 7483
6.Magnitude comparator
7.parity checker and generator
8.Mux and d-mux
9.octal to binary encoder and 2x4 decoder
10.2 bit synchronous up/down counter
11.shift registers
12.Ripple counter

Thanks

atchutharam said:

Can any one post the viva questions and answers for digital electronics lab.
The experiments are
1.half adder and full using NAND
2.binary to gray code converter
3.gray to binary code converter
4.BCD to Excees3 code converter
5.binary adder/subtractor and BCD adder using IC 7483
6.Magnitude comparator
7.parity checker and generator
8.Mux and d-mux
9.octal to binary encoder and 2x4 decoder
10.2 bit synchronous up/down counter
11.shift registers
12.Ripple counter

Thanks

Click to expand...

hi,

here are some questions:
1.which are types of modeling styles.
2. Which style is used for design of Full adder using half adder?
3. difference between behaviora and data flow modeling.
4. Bolean expressions for all combinational logics such as half adder, full adder,bin to gray and gray to bin,bcd 2 excess-3 etc.
5. Sequential statements
6. What is port declaration?
7. What is black box?
8. writtting pgm for mux, decoder etc.using basic logic gates or components
9 What is component instantiation?
10 define simulation and synthesis.
11. which simulator u use?
12. how to declare clock
13. differnce betn latch and flip flop
14 What is RTL?
15. Types of counters, block diagrams, programming.

GOOD LUCK

Thanks buddy

atchutharam said:

Thanks buddy

Click to expand...

what are the ans? coz my exam is also near

Sorry ziad i doesnt have the answers ,
i will post as soon as possibile,
if u got you also post that.,.,.ok?

1.Behavioral modeling,structural modeling and data flow modeling

2.structural modeling

3.Dataflow is one way of describing the program.Like describing the logical funtion of a particular design.
Behavioral model on the other hand describes the behavior of the system.How does it behave when particular input is given

5.wait,assertion,if,exit,next... are some of the sequential statements.

10 simulation is a process of creating a virtual design for the code we wrote. and synthesis is a process of verifying the correctness in the virtual design.

11.Xilinx ISE

13.latch just stores a bit a data and it doesnt need clock but flip flop stores one bit of data but it needs the clock

14.Resistor transistor logic and in vhdl rtl stands for register transfer level.

ziad khan said:

what are the ans? coz my exam is also near

Click to expand...

All the answers can be found in ur course book . I think u must do some home work.

all the best