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Exaple file needed (Advanced ASIC Chip Synthesis Using Synop

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Hello all,

Do you know where I can get the example files in Advanced ASIC Chip Synthesis Using Synopsys book? I have been searched it around, but I could not locate it.

If you have the example source codes and libraries, please let me know.

List of required files

tap_controller.v
tap_bypass.v
tap_instruction.v
tap_state.v

ex25_best.db
ex25_worst.db
ex25.sdb
 

Re: Exaple file needed (Advanced ASIC Chip Synthesis Using S

These are all Jtag blocks. You have two options: 1- Use synopsys boundry scan insertion commands to have synopsys automatically generate them for you or download them from open cores for the RTL. See link below:

https://opencores.org/project,openjtag-project

For the libraries, look into your synopsys installation directory. There are some sample libraries there. I know there is a generic 2.5u library there you can use.
 

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    newmedia

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Re: Exaple file needed (Advanced ASIC Chip Synthesis Using S

Thank you so much.
 

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