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eight input or gate using 89c51

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harishwww

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or gate using 89c51

hi frens
i am a newbie and i want to make eight input or gate using 89c51 pls help me on this issue i don't know how to start
but i can do one input or gate what should i do changes in this code

here: jnb p2.3
setb p1.5
clr p1.5
sjmp here

now can i do
here: jnb p2
setb p1.5
clr p1.5
sjmp here
pls help me
 

or gate using 89c51

ok, it's been a long time since i used ASM for MCS-51 but....

isn't JNB a two argument instruction???? shouldn't you have a label somewhere else???

i think you have a wrong code to begin.....


well. doing a eight input OR gate is easy if you remember that:
an OR output is TRUE when ANY of their inputs is TRUE (could be one, could be more, could all...)
an OR output is FALSE when ALL of their inputs is FALSE...

so... check if any input is logic 1, and set the output to true...

it's so d@mn easy...


..


boh, here it's (let's suppose that Port 2 are all your eight inputs...)
Code:
here:
     mov A,P2
     jz all0  ; if all inputs are 0 set output 0!
all1:       ; if any input is 1, all the port is different from 0 so, the output is 1! boh!
    setb P1.5
    sjmp here
all0:
    clr P1.5
   sjmp here

review your Instruction Set to use the instruction appropriately....
 

Re: or gate using 89c51

You can not deal with bytes using bit instructions such as JB or JNB ..
Instead, try something like the following:

Code:
here:
jnb p2.0, exit
jnb p2.1, exit
jnb p2.2, exit
jnb p2.3, exit
jnb p2.4, extt
jnb p2.5, exit
jnb p2.6, exit
jnb p2.7, exit
sjmp here

exit:
setb 01.5
lcall delay
clr p1.5
sjmp here



or:


here:
MOV A, P2
CJNE A, #0FFh, exit
SJMP here

exit:
setb p1.5
lcall delay
clr p1.5
sjmp here

IanP
:D
 

Re: or gate using 89c51


ASEM-51 V1.3 Copyright (c) 2002 by W.W. Heinz PAGE 1





MCS-51 Family Macro Assembler A S E M - 5 1 V 1.3
=====================================================



Source File: I:\ATMELP~1\8051\asem5113\or.asm
Object File: I:\ATMELP~1\8051\asem5113\or.hex
List File: I:\ATMELP~1\8051\asem5113\or.lst



Line I Addr Code Source

1: 0000 here:
2: 0000 30 A0 17 jnb p2.0, exit
3: 0003 30 A1 14 jnb p2.1, exit
4: 0006 30 A2 11 jnb p2.2, exit
5: 0009 30 A3 0E jnb p2.3, exit
6: 000C 30 A4 00 jnb p2.4, extt
^
@@@@@ symbol not defined @@@@@

7: 000F 30 A5 08 jnb p2.5, exit
8: 0012 30 A6 05 jnb p2.6, exit
9: 0015 30 A7 02 jnb p2.7, exit
10: 0018 80 E6 sjmp here
11:
12: 001A exit:
13: 001A D2 00 setb 01.5
^
@@@@@ invalid base address @@@@@

14: 001C 12 00 00 lcall delay
^
@@@@@ symbol not defined @@@@@

15: 001F C2 95 clr p1.5
16: 0021 80 DD sjmp here
17: end
18:





register banks used: ---

3 errors detected
pls it shows three errors how ?

Added after 5 minutes:

Kurenai_ryu said:
ok, it's been a long time since i used ASM for MCS-51 but....

isn't JNB a two argument instruction???? shouldn't you have a label somewhere else???

i think you have a wrong code to begin.....


well. doing a eight input OR gate is easy if you remember that:
an OR output is TRUE when ANY of their inputs is TRUE (could be one, could be more, could all...)
an OR output is FALSE when ALL of their inputs is FALSE...

so... check if any input is logic 1, and set the output to true...

it's so d(at)mn easy...


..


boh, here it's (let's suppose that Port 2 are all your eight inputs...)
Code:
here:
     mov A,P2
     jz all0  ; if all inputs are 0 set output 0!
all1:       ; if any input is 1, all the port is different from 0 so, the output is 1! boh!
    setb P1.5
    sjmp here
all0:
    clr P1.5
   sjmp here

review your Instruction Set to use the instruction appropriately....
shows no error
 

Re: or gate using 89c51

Code:
HARISH01                                                                                                      PAGE 1

                       1    $MOD252
                       2    
0000                   3    here: 
0000 30A017            4    jnb p2.0, exit 
0003 30A114            5    jnb p2.1, exit 
0006 30A211            6    jnb p2.2, exit 
0009 30A30E            7    jnb p2.3, exit 
000C 30A40B            8    jnb p2.4, exit 
000F 30A508            9    jnb p2.5, exit 
0012 30A605           10    jnb p2.6, exit 
0015 30A702           11    jnb p2.7, exit 
0018 80E6             12    sjmp here 
                      13    
001A                  14    exit: 
001A D295             15    setb p1.5 
001C 120023           16    lcall delay 
001F C295             17    clr p1.5 
0021 80DD             18    sjmp here
                      19    
0023                  20    delay:
0023 00               21    NOP
0024 22               22    RET
                      23    
                      24    end 

VERSION 1.2h ASSEMBLY COMPLETE, 0 ERRORS FOUND
HARISH01                                                                                                      PAGE 2

DELAY. . . . . . . . . . . . . .  C ADDR  0023H  
EXIT . . . . . . . . . . . . . .  C ADDR  001AH  
HERE . . . . . . . . . . . . . .  C ADDR  0000H  
P1 . . . . . . . . . . . . . . .  D ADDR  0090H  PREDEFINED  
P2 . . . . . . . . . . . . . . .  D ADDR  00A0H  PREDEFINED

:idea:
 

or gate using 89c51

Why not just check the byte for zero? If zero output = zero otherwise output =1. You don't need to test individual bits.

Keith
 

Re: or gate using 89c51

led equ p1.0


org 0h

start:

mov a,p2 ;or input
cjne a,#0,oneout
clr led
jmp start

oneout:
setb led
jmp start
 

Re: or gate using 89c51

IanP said:
Code:
HARISH01                                                                                                      PAGE 1

                       1    $MOD252
                       2    
0000                   3    here: 
0000 30A017            4    jnb p2.0, exit 
0003 30A114            5    jnb p2.1, exit 
0006 30A211            6    jnb p2.2, exit 
0009 30A30E            7    jnb p2.3, exit 
000C 30A40B            8    jnb p2.4, exit 
000F 30A508            9    jnb p2.5, exit 
0012 30A605           10    jnb p2.6, exit 
0015 30A702           11    jnb p2.7, exit 
0018 80E6             12    sjmp here 
                      13    
001A                  14    exit: 
001A D295             15    setb p1.5 
001C 120023           16    lcall delay 
001F C295             17    clr p1.5 
0021 80DD             18    sjmp here
                      19    
0023                  20    delay:
0023 00               21    NOP
0024 22               22    RET
                      23    
                      24    end 

VERSION 1.2h ASSEMBLY COMPLETE, 0 ERRORS FOUND
HARISH01                                                                                                      PAGE 2

DELAY. . . . . . . . . . . . . .  C ADDR  0023H  
EXIT . . . . . . . . . . . . . .  C ADDR  001AH  
HERE . . . . . . . . . . . . . .  C ADDR  0000H  
P1 . . . . . . . . . . . . . . .  D ADDR  0090H  PREDEFINED  
P2 . . . . . . . . . . . . . . .  D ADDR  00A0H  PREDEFINED

:idea:

I want to download this version assembler would you give me the site ???
 

or gate using 89c51

in C.

Code:
#define OR_MASK 0xff
#define OR_PORT P2
#define OR(port, bits) (port & (bits))? 1: 0

...

output=OR(OR_PORT, OR_MASK);  //returns 1 if any of or_mask on or_port is 1.

why play with asm if something far simpler / more portable exists?
 

Re: or gate using 89c51

harishwww said:
IanP said:
Code:
HARISH01                                                                                                      PAGE 1

                       1    $MOD252
                       2    
0000                   3    here: 
0000 30A017            4    jnb p2.0, exit 
0003 30A114            5    jnb p2.1, exit 
0006 30A211            6    jnb p2.2, exit 
0009 30A30E            7    jnb p2.3, exit 
000C 30A40B            8    jnb p2.4, exit 
000F 30A508            9    jnb p2.5, exit 
0012 30A605           10    jnb p2.6, exit 
0015 30A702           11    jnb p2.7, exit 
0018 80E6             12    sjmp here 
                      13    
001A                  14    exit: 
001A D295             15    setb p1.5 
001C 120023           16    lcall delay 
001F C295             17    clr p1.5 
0021 80DD             18    sjmp here
                      19    
0023                  20    delay:
0023 00               21    NOP
0024 22               22    RET
                      23    
                      24    end 

VERSION 1.2h ASSEMBLY COMPLETE, 0 ERRORS FOUND
HARISH01                                                                                                      PAGE 2

DELAY. . . . . . . . . . . . . .  C ADDR  0023H  
EXIT . . . . . . . . . . . . . .  C ADDR  001AH  
HERE . . . . . . . . . . . . . .  C ADDR  0000H  
P1 . . . . . . . . . . . . . . .  D ADDR  0090H  PREDEFINED  
P2 . . . . . . . . . . . . . . .  D ADDR  00A0H  PREDEFINED

:idea:

I want to download this version assembler would you give me the site ???

See attachment ..

:D
 

Attachments

  • asm51_5653.rar
    29 KB · Views: 94

    harishwww

    Points: 2
    Helpful Answer Positive Rating
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