EDA_hg81
Advanced Member level 2
The follow is the 1-to-2 LVCMOS/LVTTL Fanout Buffer circuit.
The input clock is 30MHZ clock, which is working fine.
Clock1 is sent into FPGA, Clock3 and Clock4 are sent to two D Flip Flops(74HCT173DB,112).
But why the outputs from pin 5 and pin 8 of fanout chip are missing?
The input clock is 30MHZ clock, which is working fine.
Clock1 is sent into FPGA, Clock3 and Clock4 are sent to two D Flip Flops(74HCT173DB,112).
But why the outputs from pin 5 and pin 8 of fanout chip are missing?