EDA_hg81
Advanced Member level 2
I have a circuit like the attached diagram for interfacing PECL(3.3V) to LVDS by AC coupling.
I have draw all signal levels at each input/output pin.
The problems are:
1) The negative input of LVDS receiver DS90LV110 has the same pulse as positive input; those two pulses are in phase. I am wondering where the pulse on negative come from?
2) The output of MC100EP01 doesn’t have proper DC offset. What is wrong with it?
Thank you for your answers.
I have draw all signal levels at each input/output pin.
The problems are:
1) The negative input of LVDS receiver DS90LV110 has the same pulse as positive input; those two pulses are in phase. I am wondering where the pulse on negative come from?
2) The output of MC100EP01 doesn’t have proper DC offset. What is wrong with it?
Thank you for your answers.