virus
Member level 1
simulator ucos
The main loop of test application from
https://www.sputnickonline.com/projects/programs/micro/uCOS_for_PIC18/index.html
look like the following:
void main (void)
{
int i_test = 0xABCD;
INTCONbits.GIEH = 0;
OSInit();
OSTaskCreate(TestTask, (void *)&i_test, &TestTaskStk[0], 0);
OSStart();
}
As from the code above, setting GIEH to 0 disables the global interrupt. I found no code wrote for enable ISR in this example. I wonder how this work as TMR0 ISR is needed to perform some OS level tasks.
I simulate this example in MPLAB v6.51, and found that TMR0 ISR was not triggered when TMR0 overflow. Am I missing something here?
Hope someone could point me a direction.
Thanks & regards,
virus
The main loop of test application from
https://www.sputnickonline.com/projects/programs/micro/uCOS_for_PIC18/index.html
look like the following:
void main (void)
{
int i_test = 0xABCD;
INTCONbits.GIEH = 0;
OSInit();
OSTaskCreate(TestTask, (void *)&i_test, &TestTaskStk[0], 0);
OSStart();
}
As from the code above, setting GIEH to 0 disables the global interrupt. I found no code wrote for enable ISR in this example. I wonder how this work as TMR0 ISR is needed to perform some OS level tasks.
I simulate this example in MPLAB v6.51, and found that TMR0 ISR was not triggered when TMR0 overflow. Am I missing something here?
Hope someone could point me a direction.
Thanks & regards,
virus