Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Digital design job interview questions

Status
Not open for further replies.

sp3_kapil

Banned
Junior Member level 1
Joined
Jan 2, 2007
Messages
18
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
0
hi,
i am having a interview ..I want digital design inteview question ...
can any buddy help me .

regards
kapil
 

vhdl pipe cpu

do google, you can get more Q's and Ans
 

Re: interview question

Few Questions :
if A and B are two clk pulses which are out of phase and having same frequency, how to find which input clk signal is leading?
Here is the simple solution for this.
All it needs is a flip flop.
if we have 2 clks, clk1 and clk2 give clk1 to D-input of flip flop and other to CLK input of FF.
if clk1 is leading the output is high.
if clk2 is leading the output is low.

Do you guys get this...
The above answer of mine assumes that the 2 clocks are of out of phase not more than 45 degrees.
If the two clocks are out of phase more than 45 degrees than state diagram implementation is to be done. I worked on it and I have the equations for the circuit implemented using 2 flip flops.

Q1(t+1)=Q1+Q2'B
Q2(t+1)=Q2+Q1'A
Z=Q2 = 1 for clkA leading else 0 for clkB leading.

work this out.


The slack is the time delay difference from the expected delay(1/clock) to the actual delay in a particular path.
Slack may be +ve or -ve.

what is/are the differences between SIMULATION and SYNTHESIS

Simulation <= verify your design.
synthesis <= Check for your timing
Simulation is used to verify the functionality of the circuit.. a)Functional Simulation:study of ckt's operation independent of timing parameters and gate delays. b) Timing Simulation :study including estimated delays, verify setup,hold and other timing requirements of devices like flip flops are met.
Synthesis:One of the foremost in back end steps where by synthesizing is nothing but converting VHDL or VERILOG description to a set of primitives(equations as in CPLD) or components(as in FPGA'S)to fit into the target technology.Basically the synthesis tools convert the design description into equations or components
can u tell me the differences between latches & flipflops?

There are 2 types of circuits:
1. Combinational
2. Sequential

Latches and flipflops both come under the category of "sequential circuits".

Difference: Latches are level-sensitive, whereas, FF are edge sensitive. By edge sensitive, I mean O/p changes only when there is a clock transition.( from 1 to 0, or from 0 to 1)
Example: In a flipflop, inputs have arrived on the input lines at time= 2 seconds. But, output won't change immediately. At time = 3 seconds, clock transition takes place. After that, O/P will change.
Flip-flops are of 2 types:
1.Positive edge triggered
2. negative edge triggered

1)fllipflops take twice the nymber of gates as latches
2) so automatically delay is more for flipflops
3)power consumption is also more

Hardware Interview Questions
X86 INTERVIEW QUESTIONS
These interview questions test the knowledge of x86 Intel architecture and 8086 microprocessor specifically.
1. What is a Microprocessor? - Microprocessor is a program-controlled device, which fetches the instructions from memory, decodes and executes the instructions. Most Micro Processor are single- chip devices.
2. Give examples for 8 / 16 / 32 bit Microprocessor? - 8-bit Processor - 8085 / Z80 / 6800; 16-bit Processor - 8086 / 68000 / Z8000; 32-bit Processor - 80386 / 80486.
3. Why 8085 processor is called an 8 bit processor? - Because 8085 processor has 8 bit ALU (Arithmetic Logic Review). Similarly 8086 processor has 16 bit ALU.
4. What is 1st / 2nd / 3rd / 4th generation processor? - The processor made of PMOS / NMOS / HMOS / HCMOS technology is called 1st / 2nd / 3rd / 4th generation processor, and it is made up of 4 / 8 / 16 / 32 bits.
5. Define HCMOS? - High-density n- type Complimentary Metal Oxide Silicon field effect transistor.
6. What does microprocessor speed depend on? - The processing speed depends on DATA BUS WIDTH.
7. Is the address bus unidirectional? - The address bus is unidirectional because the address information is always given by the Micro Processor to address a memory location of an input / output devices.
8. Is the data bus is Bi-directional? - The data bus is Bi-directional because the same bus is used for transfer of data between Micro Processor and memory or input / output devices in both the direction.
9. What is the disadvantage of microprocessor? - It has limitations on the size of data. Most Microprocessor does not support floating-point operations.
10. What is the difference between microprocessor and microcontroller? - In Microprocessor more op-codes, few bit handling instructions. But in Microcontroller: fewer op-codes, more bit handling Instructions, and also it is defined as a device that includes micro processor, memory, & input / output signal lines on a single chip.
11. What is meant by LATCH? - Latch is a D- type flip-flop used as a temporary storage device controlled by a timing signal, which can store 0 or 1. The primary function of a Latch is data storage. It is used in output devices such as LED, to hold the data for display.
12. Why does microprocessor contain ROM chips? - Microprocessor contain ROM chip because it contain instructions to execute data.
13. What is the difference between primary & secondary storage device? - In primary storage device the storage capacity is limited. It has a volatile memory. In secondary storage device the storage capacity is larger. It is a nonvolatile memory. Primary devices are: RAM / ROM. Secondary devices are: Floppy disc / Hard disk.
14. Difference between static and dynamic RAM? - Static RAM: No refreshing, 6 to 8 MOS transistors are required to form one memory cell, Information stored as voltage level in a flip flop. Dynamic RAM: Refreshed periodically, 3 to 4 transistors are required to form one memory cell, Information is stored as a charge in the gate to substrate capacitance.
15. What is interrupt? - Interrupt is a signal send by external device to the processor so as to request the processor to perform a particular work.
16. What is cache memory? - Cache memory is a small high-speed memory. It is used for temporary storage of data & information between the main memory and the CPU (center processing unit). The cache memory is only in RAM.
17. What is called .Scratch pad of computer.? - Cache Memory is scratch pad of computer.
18. Which transistor is used in each cell of EPROM? - Floating .gate Avalanche Injection MOS (FAMOS) transistor is used in each cell of EPROM.
19. Differentiate between RAM and ROM? - RAM: Read / Write memory, High Speed, Volatile Memory. ROM: Read only memory, Low Speed, Non Voliate Memory.
20. What is a compiler? - Compiler is used to translate the high-level language program into machine code at a time. It doesn.t require special instruction to store in a memory, it stores automatically. The Execution time is less compared to Interpreter.
21. Which processor structure is pipelined? - All x86 processors have pipelined structure.
22. What is flag? - Flag is a flip-flop used to store the information about the status of a processor and the status of the instruction executed most recently
23. What is stack? - Stack is a portion of RAM used for saving the content of Program Counter and general purpose registers.
24. Can ROM be used as stack? - ROM cannot be used as stack because it is not possible to write to ROM.
25. What is NV-RAM? - Nonvolatile Read Write Memory, also called Flash memory. It is also know as shadow RAM.

^Back to Top
INTEL INTERVIEW QUESTIONS
The following questions are used for screening the candidates during the first interview. The questions apply mostly to fresh college grads pursuing an engineering career at Intel.
1. Have you studied buses? What types?
2. Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
3. How many bit combinations are there in a byte?
4. For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?
5. Explain the operation considering a two processor computer system with a cache for each processor.
6. What are the main issues associated with multiprocessor caches and how might you solve them?
7. Explain the difference between write through and write back cache.
8. Are you familiar with the term MESI?
9. Are you familiar with the term snooping?
10. Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
11. In what cases do you need to double clock a signal before presenting it to a synchronous state machine?
12. You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
13. What are the total number of lines written by you in C/C++? What is the most complicated/valuable program written in C/C++?
14. What compiler was used?
15. What is the difference between = and == in C?
16. Are you familiar with VHDL and/or Verilog?
17. What types of CMOS memories have you designed? What were their size? Speed?
18. What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
19. What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
20. Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
21. What types of high speed CMOS circuits have you designed?
22. What transistor level design tools are you proficient with? What types of designs were they used on?
23. What products have you designed which have entered high volume production?
24. What was your role in the silicon evaluation/product ramp? What tools did you use?
25. If not into production, how far did you follow the design and why did not you see it into production?

^Back to Top
Read more at TechInterviews.com
EMBEDDED SYSTEMS INTERVIEW QUESTIONS
1. Can structures be passed to the functions by value?
2. Why cannot arrays be passed by values to functions?
3. Advantages and disadvantages of using macro and inline functions?
4. What happens when recursion functions are declared inline?
5. Scope of static variables?
6. Difference between object oriented and object based languages?
7. Multiple inheritance - objects contain howmany multiply inherited ancestor?
8. What are the 4 different types of inheritance relationship?
9. How would you find out the no of instance of a class?
10. Is java a pure object oriented language? Why?
11. Order of constructor and destructor call in case of multiple inheritance?
12. Can u have inline virtual functions in a class?
13. When you inherit a class using private keyword which members of base class are visible to the derived class?
14. What is the output of printf("\nab\bcd\ref"); -> ef
15. #define cat(x,y) x##y concatenates x to y. But cat(cat(1,2),3) does not expand but gives preprocessor warning. Why?
16. Can you have constant volatile variable? Yes, you can have a volatile pointer?
17. ++*ip increments what? it increments what ip points to
18. Operations involving unsigned and signed — unsigned will be converted to signed
19. a+++b -> (a++)+b
20. malloc(sizeof(0)) will return — valid pointer
21. main() {fork();fork();fork();printf("hello world"); } — will print 8 times.
22. Array of pts to functions — void (*fptr[10])()
23. Which way of writing infinite loops is more efficient than others? there are 3ways.
24. # error — what it does?
25. How is function itoa() written?
26. Who to know wether systemuses big endian or little endian format and how to convert among them?
27. What is interrupt latency?
28. What is forward reference w.r.t. pointers in c?
29. How is generic list manipulation function written which accepts elements of any kind?
30. What is the difference between hard real-time and soft real-time OS?
31. What is interrupt latency? How can you recuce it?
32. What is the differnce between embedded systems and the system in which rtos is running?
33. How can you define a structure with bit field members?
34. What are the features different in pSOS and vxWorks?
35. How do you write a function which takes 2 arguments - a byte and a field in the byte and returns the value of the field in that byte?
36. What are the different storage classes in C?
37. What are the different qualifiers in C?
38. What are the different BSD and SVR4 communication mechanisms

^Back to Top
COMPUTER ARCHITECTURE AND DESIGN INTERVIEW QUESTIONS
1. What is pipelining?
2. What are the five stages in a DLX pipeline?
3. For a pipeline with ‘n’ stages, what’s the ideal throughput? What prevents us from achieving this ideal throughput?
4. What are the different hazards? How do you avoid them?
5. Instead of just 5-8 pipe stages why not have, say, a pipeline with 50 pipe stages?
6. What are Branch Prediction and Branch Target Buffers?
7. How do you handle precise exceptions or interrupts?
8. What is a cache?
9. What’s the difference between Write-Through and Write-Back Caches? Explain advantages and disadvantages of each.
10. Cache Size is 64KB, Block size is 32B and the cache is Two-Way Set Associative. For a 32-bit physical address, give the division between Block Offset, Index and Tag.
11. What is Virtual Memory?
12. What is Cache Coherency?
13. What is MESI?
14. What is a Snooping cache?
15. What are the components in a Microprocessor?
16. What is ACBF(Hex) divided by 16?
17. Convert 65(Hex) to Binary
18. Convert a number to its two’s compliment and back
19. The CPU is busy but you want to stop and do some other task. How do you do it?
HARDWARE DESIGN INTERVIEW QUESTIONS
1. Give two ways of converting a two input NAND gate to an inverter
2. Given a circuit, draw its exact timing response. (I was given a Pseudo Random Signal Generator; you can expect any sequential ckt)
3. What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit?
4. Give a circuit to divide frequency of clock cycle by two
5. Design a divide-by-3 sequential circuit with 50% duty circle. (Hint: Double the Clock)
6. Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can’t resize the combinational circuit transistors)
7. The answer to the above question is breaking the combinational circuit and pipelining it. What will be affected if you do this?
8. What are the different Adder circuits you studied?
9. Give the truth table for a Half Adder. Give a gate level implementation of the same.
10. Draw a Transmission Gate-based D-Latch.
11. Design a Transmission Gate based XOR. Now, how do you convert it to XNOR? (Without inverting the output)
12. How do you detect if two 8-bit signals are same?
13. How do you detect a sequence of "1101" arriving serially from a signal line?
14. Design any FSM in VHDL or Verilog.
15. Explain RC circuit.s charging and discharging.
16. Explain the working of a binary counter.
17. Describe how you would reverse a singly linked list.
 
interview question

hi hairo,

Latch is level-sensitive. Means, o/p changes during HIGH "1" or LOW "0". U can confirm this in any digital design books.

Hope it helps
 

Re: interview question

Refer the links :

**broken link removed**
**broken link removed**
 

interview question

Latch is level-sensitive. Means, o/p is transparent to i/p during HIGH "1" or LOW "0".

Added after 59 seconds:

Latch is level-sensitive. Means, o/p is transparent to i/p during HIGH "1" or LOW "0".
 

interview question

latches level sencitive during total time of high or low sencitive not like the case only at edges.....
 

Re: interview question

do google, you can get more Q's and Ans

Added after 2 minutes:

I have got few basic VHDL questions:

1. What is the difference between using direct instntiations and component ones
except that you need to declare the component ?

2. What is the use of BLOCKS ?

3. What is the use of PROCEDURES?

4. What is the usage of using more then one architecture in an entity?


Mmm... What do mean by direct instantiation and component ones? In VHDL,
you always have to declare a component before you instantiate it. I don't think
I understand the question.

2. BLOCK is a tricky one. If you do mostly in synthesis, then you
will rarely need to use it. I don't remember all the detail but it has to
do how the signal is being determine whether it is global or not. (Visible
by other process, etc.) Mainly for simulation purpos. (Someone should
give more detail than I can.)

3. Procedure is a way to reuse code. Procedure and Function are very
simular except function returns something and procedure don't. Usually
procedures and functions are for testbench and simulation although I have
used them in synthesis sometimes. Do be aware that not all synthesizer
can handle it properly. One place to see how it works is to get a VHDL
SDRAM simulation model and study it. It usually use either procedure or
function. This is a very general topic, people use an entire chapter to do
this.

4. Use of more than one architecture has many benefits. For example, a
colour space converter. You can implement a standard 3x3 matrix
multiplier. But if you know you are working on a specific colour space, such
as 601, then you can optimize it to use only 4 multiplers (if I remember
correctly). In the main code, you put in a configuration line to specify which
architecture to use for that entity. It is a good way to have a module
implement or behave different under non run time situation.

h**p://www.hardi.com/haps/literature/VHDL-Handbook.pdf

The above is a link with some info. Some of your questions are more
advance VHDL. You should take a look at a book call "VHDL primier".
It is a good VHDL reference.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top