Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

What happens when capacitor one side is floating?

Status
Not open for further replies.
J

jennisjose

Member level 1
Member level 1
Joined
Feb 22, 2010
Messages
32
Helped
3
Reputation
6
Reaction score
3
Trophy points
1,288
Location
san jose
Activity points
1,472
I wanted to know what happens when a square wave is applied at one side of capacitor and the other end is open?

In cadence simulation....the output is same as the input.
But what happens in theory? And why does it happen like that?
 

It is square at output because , you have a very high impedance at output (no load), but really with a scope it is no true square as input.
 

If no current flows into a capacitor, it's keeping the initial voltage (whatever it is).

But if the node is truely unconnected, the voltage doesn't mind, I think.
 

jennisjose said:
I wanted to know what happens when a square wave is applied at one side of capacitor and the other end is open?

In cadence simulation....the output is same as the input.
But what happens in theory? And why does it happen like that?
Click to expand...

This is a very good question.

Suppose you apply voltage signal V to the left node/plate of capacitor C0. Suppose that the right node/plate has a capacitance C1 to all the nodes other than it's left plate (this can be capacitance to ground, to infinity, etc.).

This circuit is a capacitive divider, so that the voltage on the right node is:

Vright = Vleft * C0/(C1+C0)

If capacitance C1 tends to zero (floating right node having zero capacitance to the outside world), Vright=Vleft - so the right node has the same voltage as the left node.

Max
---------
 
The charging equation of capacitor when a square signal with amplitude Vi is applied is :-
Vc = Vi(1-e-t/RC)
where Vc is the Voltage across capacitor
Now the resistance seen by a floating capacitor is infinite. Putting R = infinite in the above equation gives Vc = 0.
Now, in this case, Vc could be zero only if the potential on both the plates is equal.
In other words, the floating plate of capacitor should also have a Square wave.

From another view point:- Since the circuit is open, there is no current flowing through the circuit and hence the Voltage drop across capacitor should be zero( Vc = Ic*Xc) which is possible only if both the plates have same potential all the time.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top