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ESD diodes - vdd , vss and pads connection, precautions

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bsrin

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Hi All,
I have seen some of the esd layouts which uses the diodes , clamps , ggnmos etc . I have few doubts on these.
1) Most of the diodes are pdiodes between vdd , vss and pads connected in proper way. Is there any specific reason using pdiodes instead of ndiodes.
2) What are the precautions we need to take care during esd layouts.

Thanks.
 

Re: ESD - diodes

bsrin said:
Hi All,
I have seen some of the esd layouts which uses the diodes , clamps , ggnmos etc . I have few doubts on these.
1) Most of the diodes are pdiodes between vdd , vss and pads connected in proper way. Is there any specific reason using pdiodes instead of ndiodes.
Click to expand...
just a guess. pdiode will be formed in nwell .. so inherent islolation from substrate......


2) What are the precautions we need to take care during esd layouts.

[/quote]..
you will get the guidelines for ESD structures in your DRD...... . To get more indepth refer some gud ESD books like Basic I/o ESD by Sanjay dabral....

take care of difusion area for both P and N diffusion .. and current crowding specially in DIODe..
 

Re: ESD - diodes - explanation needed

plz go through this..............

**broken link removed**
 

ESD - diodes - explanation needed

The diode body type also will vary the response to breakdown,
whether the hot carriers generated in breakdown charge the
local oxides such that leakage is suppressed or elevated
afterward ("walk-out" or "walk-in" of the knee voltage as well).
If you have multiple options, such as on SOI or multi-well,
you might choose them on this basis (survivability on an analog
attributes basis, not just gross fail).

JI technologies, the cheap ones, only have one "free-body"
diode so you will see that for branches that don't want to return
current to the substrate.

"pdiode" and "ndiode" nomenclature, though, can vary between
foundries - does it mean the highly doped region, or the body?
 

Re: ESD - diodes - explanation needed

Most foundries will either give you the layout of the ESD cells or they will have strict guidlines for them (if you are building them yourselves)

Just use those as is.
 

Re: ESD - diodes

bsrin said:
Hi All,
I have seen some of the esd layouts which uses the diodes , clamps , ggnmos etc . I have few doubts on these.
1) Most of the diodes are pdiodes between vdd , vss and pads connected in proper way. Is there any specific reason using pdiodes instead of ndiodes.
2) What are the precautions we need to take care during esd layouts.

Thanks.
Click to expand...

If the pdiode is made with p+/nwell and the ndiode is made with n+/psub there are indeed two reasons for choosing pdiode.
1. If n+/psub is used it need salicide block layer (SBLK or SAB) to add ballasting resistance. Otherwise current filamentation will happen under ESD. But it will inrease diode area much. For pdiode, big resistivity of nwell is naturally ballasting resistance and it does not need SBLK layer anymore. Area is saved.
2. when IO with ndiode see a big under shoot large amount carriers will be injected to substrate and these carriers can go far away to impact other circuit as substrate noise. Sometimes this substrate current will even trigger latch up in case of some bad layout style.
 
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