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worst case lib in setup time and best case in hold time ?

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GoodMan

GoodMan

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hi all,

why use best case in hold time constraint and worst case in setup time
constraint?
why ? who can tell me ? or any doc about this problem?

have a nice day! :wink:
 

Re: worst case lib in setup time and best case in hold time

I think because for the worst case DATA come too late and SETUP time of a flip-flop is violated. For the best case DATA is changed to early, so HOLD time will be violated. For both cases CLOCK is considered to be ideal.
 
I think you can clarify the difinitions of setup-time and hold-time first. It helps a lot.
 

Re: worst case lib in setup time and best case in hold time

In ASIC design, usually, there are three provided timing model: worst, typical, and best. Generally, worst setup time is the longest among the setup times in the three models while the best case hold time is the shortest. If your design could pass the worst cast setup time and best case hold time verification, the chance of first silicon work will be much higher.
 

max setup-time
min hold-time
 

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