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Help me design a 01020102 counter using 2 D flip flops

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logicpro9999

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I want to design a counter using 2 D flipflops
counter sequence is 01020102
counter will start with 0 and then 1 and then 0 and then 2 and will repeat.
it will pass from 0 to 1 or 2 depending the previous state
how to do that?
 

01020102 counter

I'm a little confused as to your request. A signal has only two states 0 and 1. so are you saying you want two signals, something like this?

010101010101010101010101
000100010001000100010001
 

Re: 01020102 counter

I have 2 D flipflops D1 and D2.
Their outputs will be like that
D1 LSB,D2 MSB
____0 1 0 2 0 1 0 2 0 1 0 2
Q2 : 0 0 0 1 0 0 0 1 0 0 0 1

Q1 : 0 1 0 0 0 1 0 0 0 1 0 0
Or another two output z1,z2 will give that sequence.
 

Re: 01020102 counter

Obviously, the flip-flops can't give the intended sequence directly. The sequence has 4 states, that must be coded by the FFs. So
the only solution is to recode the FF states (e.g. 0,1,2,3,0..., respecttively a binary counter) to the outputs. z1 = Q1 AND NOT Q2,
z2 = Q1 AND Q2.
 
01020102 counter

2 DFF
Lets say Q0 Q1 is output of these DFFs
D0 and D1 is input of DFFs
D0=Q0 (XOR) Q1
D1=(NOT) Q1

Output of Machine lets say Z0 and Z1
Z0=Q0 (AND) Q1
Z1=Q0' (AND) Q1

Z0,Z1 Will be
00 ,01,00,10,00,01,00,10....
 
Re: 01020102 counter

following this link **broken link removed**: On the second page of the accompanying article is a 2-bit D-ff counter that counts from 0 to 3 (0,1,2,3). Here is what you need to do:

Add an additional XOR gate between the output of the most significant ff and the input of the least significant ff. The output of the XOR gate feeding the input of the least significant ff.

The XOR gate will suppress the final count of 3 so that the circuit will only run from 0,1,2,0,1,2,...

Good luck.[/url]
 

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