hazardcell
Newbie level 3
vlog-2110 error
Whenever I try to compile the code in modelsim I get a "vlog-2110 illegal refence to net error" for the lines
basically, I need to run round 16 times (DES) and the value output in l_next from the previous iteration should be the l_prev for the current one. similarly for r_prev and k_prev. However I keep getting that error. I'm a newbie to verilog so please go easy on me
Also for some reason "i" never changes, it just remains as 0000 throughout. any help appreciated. thanks in advance
Added after 10 minutes:
OK the problem with "i" was a bit stupid. I just forgot to test it with a clock. Still can't figure out the other one though
Whenever I try to compile the code in modelsim I get a "vlog-2110 illegal refence to net error" for the lines
Code:
l_prev = l_next;
r_prev = r_next;
k_prev = k_next;basically, I need to run round 16 times (DES) and the value output in l_next from the previous iteration should be the l_prev for the current one. similarly for r_prev and k_prev. However I keep getting that error. I'm a newbie to verilog so please go easy on me
Also for some reason "i" never changes, it just remains as 0000 throughout. any help appreciated. thanks in advance
Code:
wire [63:0] r2;
wire [31:0] l_prev;
wire [31:0] r_prev;
wire [55:0] k_prev;
wire [31:0] l_next;
wire [31:0] r_next;
wire [55:0] k_next;
split3 t1( .r0(r_prev), .r1(l_prev), .x(r2) );
PC1 t2( .r(k_prev), .x(k) );
round t3( .l_prev(l_prev), .l_next(l_next), .r_prev(r_prev), .r_next(r_next), .k_prev(k_prev), .k_next(k_next), .i(i) );
initial @ ( posedge clk, posedge req )
begin
if( req == 1 )
begin
m = M;
k = K;
i = 4'b0;
end
end
always @ ( posedge clk, posedge req )
begin
if( i < 4'b1111 | i == 4'b1111 )
begin
i = i + 1;
l_prev = l_next;
r_prev = r_next;
k_prev = k_next;
end
endAdded after 10 minutes:
OK the problem with "i" was a bit stupid. I just forgot to test it with a clock. Still can't figure out the other one though
