Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Insertion of Tie cell into the design

Status
Not open for further replies.

jitendravlsi

Full Member level 2
Full Member level 2
Joined
Jul 21, 2008
Messages
132
Helped
8
Reputation
16
Reaction score
5
Trophy points
1,298
Activity points
2,136
Can anybody suggest me the advantages of inserting the tie cells into the design after placing the instances, rather than inserting them into the design during logic synthesis?

from where we get these tie cells?



thanx in advance
 

Hi,

It's the right way to insert after the placement optimization is finished during PNR.

The reason is because PNR tools isn't able to place the tie cells at the right location close to relative logics and optimize the tie cells.

If pre-layout netlist (logic synthesis) has the tie cells, that must be cause a serious routing congestion.

Thanks.
 

    jitendravlsi

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top