wolfrain
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rpolyh's cap
I am using rpolyh as the resistor used in the layout (Cadence Virtuoso). And I currently find that the resistor has a 'Cap' in the property in the extracted view, but not in the layout view. I think this is the parasitic capacitance generated after extraction. But my question is :
1. I compare two different size of resistors (which both have the approximate resistance 17643, one is 2 micron in width 26.25 micron in length and the other is 10 micron in width and 144 micron in length), and extract them in my design. To my surprise the parasitic capacitance are significantly different, the former one is 10 while the other is 200 !! Someone can tell me why?
2. And what's the point in using a big resistor? If I use a big resistor, not only it takes more room to place it, but also generate more parasitic capacitance which we don't wanna see !...
Thank you in advance
cheers,
wolfrain
I am using rpolyh as the resistor used in the layout (Cadence Virtuoso). And I currently find that the resistor has a 'Cap' in the property in the extracted view, but not in the layout view. I think this is the parasitic capacitance generated after extraction. But my question is :
1. I compare two different size of resistors (which both have the approximate resistance 17643, one is 2 micron in width 26.25 micron in length and the other is 10 micron in width and 144 micron in length), and extract them in my design. To my surprise the parasitic capacitance are significantly different, the former one is 10 while the other is 200 !! Someone can tell me why?
2. And what's the point in using a big resistor? If I use a big resistor, not only it takes more room to place it, but also generate more parasitic capacitance which we don't wanna see !...
Thank you in advance
cheers,
wolfrain
