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Sine Wave generation from triangular wave

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Usman Hai

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cordic wave generation

Is it possible to generate some sort of sine wave generation on FPGA.

Using CORDIC algo is it possible.

what shud we do if we want to generate analog signal on FPGA.
is there any alternative.

USMAN HAI
 

module sine_cos

what frequency level?
 

cordic generate sine wave

If you can generate a PWM signal you can make a simple D/A converter. Just low pass filter the PWM signal. This link explains how it is done. **broken link removed**
 
shift register sine wave

You can build a data lib of sine wave,then send data to DA converter,and use a filter,you can get sine wave
 

sine wave generation using shift register

almost all popular fpgas have large sram blocks, so you can :

1) generate a sine wave look up table file by using for example matlab and store this file in the sram blocks.
2) address this sram continually.
 

code for generation of sine wave using fpga

hi,

What you are going to do is named DDS (Direct Digital Synthesis).

Analog Devices do that very well :

h**p://www.analog.com/Analog_Root/sitePage/productCategoryTree/0,2142,level4%253D%25252D1%2526Language%253DEnglish%2526level1%253D117%2526level2%253D137%2526level3%253D%25252D1%2526lind%253D0,00.html

* = t
 

cordic sine wave generator

Hi,
Here is the synthesizable code for sine wave generation.
It works I checked on Xilinx XC4005XL

Code:
module sine_cos(clk, reset, en, sine, cos);
   input clk, reset, en;
   output [7:0] sine,cos;
   reg [7:0] sine_r, cos_r;
   assign      sine = sine_r + {cos_r[7], cos_r[7], cos_r[7], cos_r[7:3]};
   assign      cos  = cos_r - {sine[7], sine[7], sine[7], sine[7:3]};
   always@(posedge clk or negedge reset)
     begin
         if (!reset) begin
             sine_r <= 0;
             cos_r <= 120;
         end else begin
             if (en) begin
                 sine_r <= sine;
                 cos_r <= cos;
             end
         end
     end
endmodule // sine_cos
module pwm_gen(clk,reset_n, pwm_din, pwm_out);
   input   clk, reset_n;
   input [7:0] pwm_din;
   output      pwm_out;
   reg         pwm_out;
   reg [7:0]   pwm_cnt;
   assign      pwm_out_nx = (pwm_cnt <= pwm_din) ? 1'b1 : 1'b0;
   always @(posedge clk or negedge reset_n)
     begin
         if (!reset_n) begin
             pwm_cnt <= 0;
             pwm_out <= 0;
         end else begin
             pwm_cnt <= pwm_cnt + 1'b1;
             pwm_out <= pwm_out_nx; 
         end
     end
   
endmodule
     
module sine_cos_tst();
   reg clk, reset;
   wire [7:0] sine,cos;
   wire        clk_256, pwm_out;
   reg         clk_256_r;
   reg [7:0]   cnt_256;
   sine_cos u1(clk,  reset, clk_256, sine, cos);
   pwm_gen pwm_gen (clk, reset, {~sine[7],sine[6:0]}, pwm_out);
   initial begin
       $shm_open("./WAVEFORM");
       $shm_probe(sine_cos_tst, "AS");
       clk = 0;
       reset = 0;
       cnt_256 = 0;
       clk_256_r = 1'b0;
       #33 reset = 1;
       #2000000 $finish;
   end
   
   always #5 clk = ~clk;
   always @ (posedge clk) begin
       cnt_256 <= cnt_256 + 1;
       clk_256_r <= cnt_256[7];
   end
   assign clk_256 = cnt_256[7] & ~clk_256_r;
   
endmodule
 

sine wave generation in cpld

In fact there are Direct Digital Synthesizer cores all over the internet, however I believe it will be better if you used a DDS IC from any RF vendor like nalog device's.

The DDS generates a custom frequency sine wave, basicly it is a ROM table that contains the value of the Cosine table and a counter to access the ROM data, the counter it self can be with multiple function to generate any custom signal, you can read more about the topic of DDS to get the exact idea.

However still you will need an DAC to convert the FPGA o/p to a sinewave,

Thats all folks
 

generation of magic sinewave

Xilinx in some XAPP proposes the sigma-delta DAC which
needs to attache to FPGA only one resistor and capacitor.
And the digital sine wave generator is as usual.
One interesting digital sine wave generator is
the square wave generator + digital filter, which filters
the first harmonic of the square wave.
 

Sine Wave generation

give you a popular method.

firstly, determine your precesion, which decides your number of DA chip bits.
second, generate binary files ralated sin or cos function.
third, save the files into ROM or create a table in FPGA to store them.
last, complete it. it's ok.
 

Sine Wave generation

Is it efficient to use a LUT if you need to have sinewaves with different magnitudes not multiples of 2 (i.e. need 3 waves for QA modulation)? If I store 256 samples per quarter of a wave (enough to build complete period by switching LUT counter), that would require 3 LUTs of that size to store 3 waves. Would this three LUTs above nicely fit into Spartan2 xc2s200-5pq208?

Is it more efficient than using for example CORDIC core and changing magnitude of the vector by inserting different initial values? and by how much?
 

Re: Sine Wave generation

I believe that the sinewave LUT can be generated through the block RAM rather than LUT table, this will save on u a lot of area, which can not be saved through the cordic as well as a more speed can be done if u resgistered the o/p
 

Sine Wave generation

1. How do I use RAM instead of LUT? I was using a package with WHEN statements to point to table values, so I've assumed it was LUT.

2. "which can not be saved through the cordic"
I thought CORDIC takes much less in space than LUT because except the code, it has a small LUT for constant angles.

3. How do I register o/p?

Thank you :)
 

Re: Sine Wave generation

Look Magic Sinewaves:
https://www.tinaja.com/magsn01.asp


"Magic sinewaves" are repeating long sequences of ones and zeros.
They can get created from ordinary but extremely carefully chosen
digitally switched pulses.

Digital sinewaves with precisely controlled amplitudes and amazingly
low distortions. Compared to traditional PWM, magic sinewaves can
offer far higher efficiencies and lower distortions. With circuitry that
is elegantly simple and microcontroller friendly.

For use in such applications as induction motor speed controls, electric
autos, solar panels, power factor correction, inverters, home energy
efficiency improvers, 400 Hz avionics, UPS, PFC, and special utilities.

The newest steplocked versions of magic sinewaves let you force any
desired number of low harmonics precisely to zero, while allowing you
to do so at the highest possible efficiency. By using the fewest possible
switching events.
 

Sine Wave generation

assign sine = sine_r + {cos_r[7], cos_r[7], cos_r[7], cos_r[7:3]};
can be written as:
assign sine = sine_r + {4{cos_r[7]}, cos_r[6:3]};
 

Re: Sine Wave generation

Every 4:1 function "or less" usually is implmented in a LUT in Spartan-2, more over Spartan2 LUT can be used as a not only as a LUT (4:1) but as well as distributed 16X1 RAM/ROM, or a SRLE16 "16 bit serial shift register". "read the spartan2 data sheet"
What I wanted you instead of using a ROM to save the phase/amplitude table u may use a RAM "use the intialization constraint INIT to store the data", moreover u can use the BRAM "block RAM" this wayu will save a lot of area on your FPGA for other logic that will associate u to produce the sine wave like adder,controller ...etc. also, although BRAM may be slower than distributed RAM, but if u are not customed with placment constraints a BRAM in your design may be faster than if u used a distributed RAM "read more about relative placement Macro".
you can register your BRAM o/p as well to get the more fast performance but u will have to take care of the latency.
 

Sine Wave generation

you can make use of CPLD and DA converter to complete it.
or you can replace CPLD into EEPROM, that is, you can store waveform data into the EEPROM.
 

Re: Sine Wave generation

you can use direct digital synthesis technology to generate sine wave(digital

form) in fpga. if you need analog format sine wave, you can convert digital format

into analog wave by a DAC.

best regards




Usman Hai said:
Is it possible to generate some sort of sine wave generation on FPGA.

Using CORDIC algo is it possible.

what shud we do if we want to generate analog signal on FPGA.
is there any alternative.

USMAN HAI
 

Re: Sine Wave generation

hi Usman Hai,

U have asked about the possibility of generating a sinewave using the CORDIC, in fact this is possible but with caution mainly because of the latency of the CORDIC, still it can be done but the you should take care because the behavior of the CORDIC is not linear so you will need a feedback to generate the appropriate sinewave, but the CORDIC out is late than the processed so the feedback of this signal will be applied on N-latented signals!!!
 

Re: Sine Wave generation

CORDIC was effective algorithm when sine values are unknown and multipliers
are absent.
When multipliers are in posession
the sine generation would be better using the algorithm
of complex number multiplication.
The sine-cosine couple is multiplied by the vector representing the given angle.
But due the truncation error the process is unstable.
Therefore some logic is needed to
stabilize the output magnitude.

But I did such generator without stabilization.
I used rational fractions which exactly represent the vector of the length 1
due to the Piphagore theorem.
 

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