design compiler student workshop

clock skew

what are different kinds of skew in digital integrated circuits??can anyone explain it in details
:?:

Re: clock skew

This book will help u

Digital integrated circuits - rabaey
Chapter 10.

Re: clock skew

research_vlsi said:

This book will help u

Digital integrated circuits - rabaey
Chapter 10.

Click to expand...

i've that book... i want to know about useful skew,local skew ,global skew and all those things..it's not given in this book

Re: clock skew

i've that book... i want to know about useful skew,local skew ,global skew and all those things..it's not given in this book


Dear Biku,

useful skew:- This is the min skew required to meet both setup and hold violations of a path.

Sometimes, what happens, when we try to meet setup with skew=0(practically 0 skew is not possible) then hold get disturbs and vice-versa. so in that case we keep some skew in between the flops to meet both setup and hold. This skew is useful skew.

Local skew:- This is the skew between two adjacent flops of the same clock path.
like between 1&2, or 2&3, or 3&4 ...............

Global skew:- This is the max skew between two flops of the same clock path.
like if max skew for the above mentioned group is between 1&4 then that is global skew.

I hope its enough..

Re: clock skew

thanks jitendra....