Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

NANOSIM - VCS : use_spice

Status
Not open for further replies.
T

tok47

Advanced Member level 4
Full Member level 1
Joined
Jan 16, 2004
Messages
119
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Location
Kuala Lumpur, MALAYSIA
Activity points
1,013
Hi ALL,


Anyone use this command before "use_spice -cell" ?

If let say I have this " use_spice -cell testchip_A".

Is it the tool will choose all the entire ckt and sub-ckt in testchip_A will be SPICE?

Thanks


Tok
 

as per my understanding

if u specify command use_spice -cell testckt

then ns-vcs will assume all testckt is in spice.

if u have some parts of testckt block in verilog ( dough nut partitioning)
e.g u have inv and buf inside testckt where inv is spice and buf is verilog

then u must specify
use_verilog -module buf

while creating simv , ns-vcs parser will partition design in spice and verilog depending upon use_spice and use_verilog commands.

hope this helps!!
 

how about i have some other blocks which I have VERILOG and also SPICE?

Let say, I have Instance A with VERILOG and also SPICE in Circuit TESTCKT.

If I "use_spice -cell TESTCKT"

Will Instance A selected as VERILOG or SPICE?

Thanks

Tok
 

while creating simv all decision are done , which one to be used for spice and which one for verlog...

if u have declared testckt as spice , and some internal blocks u have both in spice and verilog
cosim will take spice defination in that case.
use_verilog command will force to take verilog equivalent of same

u can easily make small testcase to verify above,
check simv.msv/interface_element.rpt file.... and hierarchy.rpt

these file clearly identifies boundry elements and used model for each block...

also check "Mixed-Signal Simulation User Guide"
download from solvnet ..
it has all details on commands and usage
 

    T

    tok47

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top