Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Conductor backed CPW feed lines

Status
Not open for further replies.
L

leaps

Member level 2
Member level 2
Joined
Jul 10, 2008
Messages
53
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,286
Activity points
1,620
conductor backed coplanar waveguide

halo i am want to design a 100ohm and 50 ohm CBCPW as shown in figure now my question is what should be the optimum ration between g and w.how to avoid unnwanted modes .i have designed line using hfss now the thing is using different values of g and w i can get the same impedance are there limitation's between ration of g and w i have to avoid.
i need help urgently
 

There are two unwanted propagation modes you want to avoid in a GCPW:

1. Slot line mode: This is avoided by keeping the grounds on the signal layer at the same potential by shorting them with an air bridge.

2. Parallel plate mode: This can be avoided by shorting the grounds on the signal layer to the substrate ground with the help of a via.

After that, it is advisable to keep the width of the ground line on the G-S-G layer at least 2.5 times the gap between the ground and signal lines to avoid return currents.

You may find more information on this at:
**broken link removed**
 
i have linewith s=0.3mm and g=1.2 for 100 ohms line is it ok ?
 

Yes, that line width is ok as long as the manufacturing process allows such tolerances. This should still be ok in a standard PCB manufacturing processes where the tolerances are better than 0.1mm.
 

the substrate i am using is 0.762mm in that case are the values right ?
 

ace_operations said:
There are two unwanted propagation modes you want to avoid in a GCPW:

1. Slot line mode: This is avoided by keeping the grounds on the signal layer at the same potential by shorting them with an air bridge.

2. Parallel plate mode: This can be avoided by shorting the grounds on the signal layer to the substrate ground with the help of a via.

After that, it is advisable to keep the width of the ground line on the G-S-G layer at least 2.5 times the gap between the ground and signal lines to avoid return currents.

You may find more information on this at:
**broken link removed**
Click to expand...

Although, its too old thread, but still I have some problem in my design using HFSS so kindly help in this regard. I am sending the HFSS file that I made. I s my str. dimensions and waveport size is OK?

Thanx if somebody comes up with the help.
 

sorry i dont see your file
 

leaps said:
sorry i dont see your file
Click to expand...


Hello leaps

I am attaching you the file...that was missed that time.....
i want to design a 50 ohm CPW line with right mode propagating...can u help in this regard..?


I will b thnkful 4 ur help...
 

Attachments

  • CPW 94 GHz_3.38_203um_final.rar
    39.7 KB · Views: 144

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top