Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Local Skew & Global Skew

Status
Not open for further replies.
local skew

locak skew: skew between the launch reg's clock and the capture reg's clock

global skew: the max skew in the clock tree

If any error,please correct me
 

    kumar_eee

    Points: 2
    Helpful Answer Positive Rating
local skew global skew

Local Skew : Source and Destination flop insertion delay is called local skew.

Global Skew : Max insertion delay minus Min Insertion Delay is called Global Skew.
 

    kumar_eee

    Points: 2
    Helpful Answer Positive Rating
local skew and global skew

Hi Kapil,

What is the significance of Global skew.

Regards,
 

    V

    Points: 2
    Helpful Answer Positive Rating
what is global skew

Significance of Global Skew is it finds out the delay of the clock tree in such a way that it removes the setup violation as well as Hold violation. In this context, we have to use skew balancing to get the required slack.

Hope this helps...
 

    kumar_eee

    Points: 2
    Helpful Answer Positive Rating
why global skew?

Hi Kapali,

>>Significance of Global Skew is it finds out the delay of the clock tree in such a way that it removes the setup violation as well as Hold violation.

I am not clear with above statement? How global skew removes the setup and hold violation. Please will elobarate.

Regards
 

skew balancing

good point to discuss, generally even a cts algoritham quality is estimated on the basis of the global skew, but i dont get why it is of importance, if a local skew b'wen adjusant registers is small that will help in timing
 

No idea why global skew is of any importance at all...

Local skew should be generally minimized, or sometimes could be increased for a too slow path between two registers. And skew between registers driving synchronous output should be generally minimized? Is that correct? Is there any situation where global skew matters at all?
 

    kumar_eee

    Points: 2
    Helpful Answer Positive Rating
the EDA speaks also of the useful/local/global skews
useful is as you call the local skew
the local skew is the skew in a sub-group
global skew is the skew that include all clocks pins.
 

How to report local skew?
It seems that Primetime can only report global skew.
 

that's right, PrimeTime can not repot local/skew skew.
But the most important is the setup/hold.... checks passed.

the skew/clock reports some info on the clock tree quality, that's all.
 

    kumar_eee

    Points: 2
    Helpful Answer Positive Rating
In my opinion, if you are working on a chip (flat design), the global skew is not important if you can close timing, especially for hold.
Buf if you are working on a block and it is a full chip clock domain, the global skew will make effect at full chip timing for global clock balance. You need to meet the latency &. skew requirements for chip timing close.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top