SP2QBN
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programmer for 89s8253
I did not say that.
But it seems that you are totaly right pointing that:
Therefore it is clear why 455 kHz clock while programming is maximum in most cases.
as per your statement "I don't want to go into it. "
I did not say that.
But it seems that you are totaly right pointing that:
The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the CPU clock at XTAL1 divided by 16.
Therefore it is clear why 455 kHz clock while programming is maximum in most cases.