DDR SDRAM Memory Organization

ddr rank bank

**broken link removed** page 20: Block diagram of 128M SDRAM

ddr memory organization

thanks, but i have this document. it did not show the details. But, i have already understood all that. Here it is:

For example my memory DDR SDRAM module dimm is 512Mega bytes. And it is dual rank. so it has 16 chips, 8 chips on each side.

the above schematic shows how those chips are connected. and the organization is as follows:

Each chip has 4 banks.

Each bank has a dimension of 1024 columns and 8192 rows.

Each chip is 8 bitwide..so each cell of the bank array is 8 bits!

Now we calculate the number of bits per chip:

8192(rows) x 1024(columns) x 8(cell size) = 67 108 864 bits (ONE BANK)

Four banks make up: 67 108 864 x 4 = 268 435 456 bits (ONE CHIP)

So! One chip has 268 435 456 BITS OR 33 554 432 BYTES

In other words one chip is 32MegaBytes... I have 16 chips...so the DIMM module is 512MegaBytes.


The RANK is a group of chips. The rank is selected by the S#0 and S#1 signals on the above schematic. For example when S0# is asserted, rank 0 is selected, and the chips 1,2,3,4,5,6,7,8 are selected through the CS# signals.

Now we can operate over those chips, and if we select some bank... say bank 2... then bank 2 will be selected in all of those eight selected chips!

now if we select some row...say row x, then this row will be selected in all of those chips with open bank 2!

At this stage, we can operate on the following amount of memory:

1024(number of columns) x 8 (cell size) x 8 (number of chips selected) = 65 536 bits.

that's it... i think someone may find this information useful if he has questions about bank/rank/ddr organization.

Yes, it's useful.
What does dual rank mean?
How to connect their DQ data buses?
How to choose rank?