Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

A question about FET PA input matching

Status
Not open for further replies.

triple_core

Member level 3
Member level 3
Joined
Jun 18, 2007
Messages
59
Helped
2
Reputation
4
Reaction score
1
Trophy points
1,288
Activity points
1,699
Hello,

I did some simulation of a FET PA, but i'm confused.

I connect a FET to a transmission line. The input impedance of the FET is 10+0j Ohm. I found that the maximal gain is achieved when the Z0 of the transmission line is about 20 Ohm. When the Z0 equals the input impedance of FET, the gain is much smaller.

I think the reason is that, the gain is propotional to (Vgs-Vt)^2, so large input voltage swing results in larger gain, rather than matched cased.

Can anyone tell me if it is right?
And if I do so, should I check the reflection coefficient, and how much value of RC is allowed?

thanks a lot!
 

what is the frequency of operation. ?
i think the FET should provide some capacitance input impedance

khouly
 

he he he. So you connected a transmission line of Z0 impedance to the fet. What about the line length? What about the generator source impedance?
 

The input impedance of the FET is not 10+j*0 Ohm anymore because transmission line rotatets the this impedance on the Impedance plane in according with line length..
 

Thanks you very much for so many helps!

the frequency is 880 MHz.

I didn't connect the transmission line in serial, but to the middle of the transmission line, as distributed amplifier. So I think my FET looks direct into the Z0 of transmission line.
 

How do you drive the PA?
 

I'm a beginer in RF, so maybe my description is wrong.

What I really want to know is that, the input impedance of my FET is too small, if I match it, the low impedance makes the voltage swing too small, and thus the drain current is too small, the gain is only 6. But If the source impedance is larger than the FET, the larger voltage switch in the input makes the gain larger.

From basic books, I thought the PA should be conjungate matched at input for the maximal gain. But in my case not.

I want to know how should I do now?

Thanks very much!!
 

When your source impedance is largely different from your load, the source outputs twice the voltage swing, which explains the big swing and more gain.
 
psmon said:
When your source impedance is largely different from your load, the source outputs twice the voltage swing, which explains the big swing and more gain.

Thanks, I think you are right.

But is it allowed to do so in the input matching?
should I check about the VSWR in input, or something like that.
 

First input match, then you always have the same input swing. Then go on to the output.
 

psmon said:
First input match, then you always have the same input swing. Then go on to the output.

But if the input is matched, the gain is only 6, it's not enough.

Is it now allowed to do mismatch in input?

thanks in advance for so much questions.
 

If your PA is a stand alone, you should be concerned with S11 as you want as much input power into your PA, and not get reflected.

If you want high gain, increase the size or current.

Please provide more design specifications and process.
 

psmon said:
If your PA is a stand alone, you should be concerned with S11 as you want as much input power into your PA, and not get reflected.

If you want high gain, increase the size or current.

Please provide more design specifications and process.

Thanks!!!

I want to have high gain. But if I increase the size, the input impedance decreases again. The mismatch becomes worse.

I use the 0.5um E-pHEMT device. I'm not sure why the Rin so small. I read from textbook, the Rin of FET should be much larger.
 

kspalla said:
May I ask you to share the design?

It'not a real design. The specification is conventional GSM handset PA
I just learning RF.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top