triple_core
Member level 3
Hello,
I did some simulation of a FET PA, but i'm confused.
I connect a FET to a transmission line. The input impedance of the FET is 10+0j Ohm. I found that the maximal gain is achieved when the Z0 of the transmission line is about 20 Ohm. When the Z0 equals the input impedance of FET, the gain is much smaller.
I think the reason is that, the gain is propotional to (Vgs-Vt)^2, so large input voltage swing results in larger gain, rather than matched cased.
Can anyone tell me if it is right?
And if I do so, should I check the reflection coefficient, and how much value of RC is allowed?
thanks a lot!
I did some simulation of a FET PA, but i'm confused.
I connect a FET to a transmission line. The input impedance of the FET is 10+0j Ohm. I found that the maximal gain is achieved when the Z0 of the transmission line is about 20 Ohm. When the Z0 equals the input impedance of FET, the gain is much smaller.
I think the reason is that, the gain is propotional to (Vgs-Vt)^2, so large input voltage swing results in larger gain, rather than matched cased.
Can anyone tell me if it is right?
And if I do so, should I check the reflection coefficient, and how much value of RC is allowed?
thanks a lot!