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Help needed in simulating Switched Capacitor circuit

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dexter_ex_2ks

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Hello, I composed a schematic in Vituoso with 2 TG(4 transistor at all), these transmission gates are in series connected (from in to out). And between them, I placed a capacitor, lets say 10pF (or 50pF) to ground. The switches are driven from an non-overlapping generator( made by 2 'vpluse' sources, each one having T=5ns period). All is ok. From teh output I placed a 'vcvs' (voltage-controlled-voltage-source), and from the output of the 'vcvs' placed another switch, and after that a capacitor to ground, to form a S&H.
I know this will form LowPass filter 1/(Rcapechiv. * CAPtognd) ;
My questions are:
1) for PSS, what do I do with the input, set it to ground? (for period I will set 5ns, witch is the period of one vsourse, from the non-overlapping generator), and what else do I need to set in PSS window (I believe something like maxsideband).
I've read the 'Simulating SC Filter with SpectreRF from Designers Guide' but I haven't understood too much.
What do I need to do further to simulate an PAC, for a filter.
I do not know how to input a Verilog-A module(to be more specific the S&H from the article mentioned above, in schematic and to simulate)
So what do I need to plece in PSS window? Can you guide me ?


Thanks in advance.
 

May be these discussions can help you:
 
For switching capacitors circuit you can try NL5 simulator. It was designed for SMPS, with any sort of switching circuits in mind. Here is screenshot of simple schematic.

Thanks,
Alexei.
 
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